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Searched refs:CombineTo (Results 1 – 11 of 11) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp608 return TLO.CombineTo(Op, Z); in ShrinkDemandedOp()
1749 return TLO.CombineTo( in SimplifyDemandedBits()
1767 return TLO.CombineTo( in SimplifyDemandedBits()
1790 return TLO.CombineTo( in SimplifyDemandedBits()
1929 return TLO.CombineTo( in SimplifyDemandedBits()
1958 return TLO.CombineTo( in SimplifyDemandedBits()
2073 return TLO.CombineTo( in SimplifyDemandedBits()
2335 return TLO.CombineTo(Op, in SimplifyDemandedBits()
2581 return TLO.CombineTo( in SimplifyDemandedBits()
2672 return TLO.CombineTo(Op, in SimplifyDemandedBits()
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H A DDAGCombiner.cpp3342 return CombineTo( in visitADDO()
3643 return CombineTo( in visitUADDO_CARRYLike()
12974 CombineTo(N, NewValue); in CombineExtLoad()
13046 CombineTo(N, And); in CombineZExtLogicopShiftLoad()
13505 CombineTo(N, And); in visitSIGN_EXTEND()
13799 CombineTo(N, And); in visitZERO_EXTEND()
14521 CombineTo(N, ExtLoad); in visitSIGN_EXTEND_INREG()
14538 CombineTo(N, ExtLoad); in visitSIGN_EXTEND_INREG()
17666 CombineTo(N, ExtLoad); in visitFP_EXTEND()
17667 CombineTo( in visitFP_EXTEND()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h3813 bool CombineTo(SDValue O, SDValue N) { in CombineTo() function
4099 SDValue CombineTo(SDNode *N, ArrayRef<SDValue> To, bool AddTo = true);
4100 SDValue CombineTo(SDNode *N, SDValue Res, bool AddTo = true);
4101 SDValue CombineTo(SDNode *N, SDValue Res0, SDValue Res1, bool AddTo = true);
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp41042 return TLO.CombineTo( in SimplifyDemandedVectorEltsForTargetNode()
41084 return TLO.CombineTo( in SimplifyDemandedVectorEltsForTargetNode()
41091 return TLO.CombineTo( in SimplifyDemandedVectorEltsForTargetNode()
41110 return TLO.CombineTo( in SimplifyDemandedVectorEltsForTargetNode()
41144 return TLO.CombineTo( in SimplifyDemandedVectorEltsForTargetNode()
41183 return TLO.CombineTo( in SimplifyDemandedVectorEltsForTargetNode()
41656 return TLO.CombineTo( in SimplifyDemandedVectorEltsForTargetNode()
41775 return TLO.CombineTo( in SimplifyDemandedBitsForTargetNode()
41912 return TLO.CombineTo( in SimplifyDemandedBitsForTargetNode()
52640 DCI.CombineTo(N, Setcc); in combineSext()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp14291 DCI.CombineTo(N, Res, false); in PerformMULCombine()
14561 DCI.CombineTo(N, Res, false); in PerformORCombineToBFI()
14588 DCI.CombineTo(N, Res, false); in PerformORCombineToBFI()
14605 DCI.CombineTo(N, Res, false); in PerformORCombineToBFI()
14626 DCI.CombineTo(N, Res, false); in PerformORCombineToBFI()
16069 DCI.CombineTo(N, NewResults); in TryCombineBaseUpdate()
16351 DCI.CombineTo(N, NewResults); in PerformMVEVLDCombine()
16435 DCI.CombineTo(VLD, VLDDupResults); in CombineVLDDUP()
20223 return TLO.CombineTo(Op, NewOp); in targetShrinkDemandedConstant()
20271 return TLO.CombineTo( in SimplifyDemandedBitsForTargetNode()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp6622 DCI.CombineTo(N0.getNode(), TruncSelect); in combineZERO_EXTEND()
6792 DCI.CombineTo(User, EltLoad, true); in combineLOAD()
7091 DCI.CombineTo(N, ESLoad); in combineVECTOR_SHUFFLE()
7095 DCI.CombineTo(Load.getNode(), ESLoad, ESLoad.getValue(1)); in combineVECTOR_SHUFFLE()
7357 DCI.CombineTo(N, ResVal); in combineBSWAP()
7361 DCI.CombineTo(Load.getNode(), ResVal, BSLoad.getValue(1)); in combineBSWAP()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp2077 return TLO.CombineTo(Op, New); in optimizeLogicalImm()
21209 DCI.CombineTo(LD, NewResults); in performPostLD1Combine()
21879 DCI.CombineTo(N, NewResults); in performNEONPostLDSTCombine()
21880 DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs)); in performNEONPostLDSTCombine()
22253 DCI.CombineTo(N, BR, false); in performBRCONDCombine()
22536 DCI.CombineTo(Generic, SDValue(N, 0)); in performFlagSettingCombine()
23407 DCI.CombineTo(N, ExtLoad); in performSignExtendInRegCombine()
23408 DCI.CombineTo(Src.getNode(), ExtLoad, ExtLoad.getValue(1)); in performSignExtendInRegCombine()
23576 DCI.CombineTo(N, ExtLoad); in performFPExtendCombine()
23577 DCI.CombineTo( in performFPExtendCombine()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp5259 DCI.CombineTo(N, Val, false); in PerformANDCombine()
5313 DCI.CombineTo(N, Val, AddTo); in PerformANDCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp15157 return DCI.CombineTo(N, Op0.getOperand(0), Op0.getOperand(1)); in PerformDAGCombine()
15162 return DCI.CombineTo(N, Lo, Hi); in PerformDAGCombine()
15172 return DCI.CombineTo(N, Lo, Hi); in PerformDAGCombine()
15191 return DCI.CombineTo(N, Lo, NewHi); in PerformDAGCombine()
15196 return DCI.CombineTo(N, Lo, NewHi); in PerformDAGCombine()
15315 DCI.CombineTo(N, Res); in PerformDAGCombine()
16204 return TLO.CombineTo(Op, NewOp); in targetShrinkDemandedConstant()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp15837 DCI.CombineTo(Bitcast2, FloatLoad); in PerformDAGCombine()
15838 DCI.CombineTo(Bitcast, FloatLoad2); in PerformDAGCombine()
15975 DCI.CombineTo(N, Perm, TF); in PerformDAGCombine()
16140 DCI.CombineTo(N, ResVal); in PerformDAGCombine()
16144 DCI.CombineTo(Load.getNode(), ResVal, BSLoad.getValue(1)); in PerformDAGCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp3793 DCI.CombineTo(N, BC, NewLoad.getValue(1)); in performLoadCombine()
4335 DCI.CombineTo(N, Lo, Hi); in performMulLoHiCombine()