| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 4820 MVT CmpVT = N0.getSimpleValueType(); in tryVPTESTM() local
4821 MVT CmpSVT = CmpVT.getVectorElementType(); in tryVPTESTM()
4899 unsigned Scale = CmpVT.is128BitVector() ? 4 : 2; in tryVPTESTM()
4901 unsigned NumElts = CmpVT.getVectorNumElements() * Scale; in tryVPTESTM()
4902 CmpVT = MVT::getVectorVT(CmpSVT, NumElts); in tryVPTESTM()
5793 MVT CmpVT = N0.getSimpleValueType(); in Select() local
5802 switch (CmpVT.SimpleTy) { in Select()
5860 MVT CmpVT = N0.getSimpleValueType(); in Select() local
5980 (!(Mask & 0x80) || CmpVT == MVT::i8 || in Select()
5988 (!(Mask & 0x8000) || CmpVT == MVT::i16 || in Select()
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| H A D | X86FastISel.cpp | 2071 EVT CmpVT = TLI.getValueType(DL, CmpLHS->getType()); in X86FastEmitCMoveSelect() local
2073 if (!X86FastEmitCompare(CmpLHS, CmpRHS, CmpVT, CI->getDebugLoc())) in X86FastEmitCMoveSelect()
2306 EVT CmpVT = TLI.getValueType(DL, CmpLHS->getType()); in X86FastEmitPseudoSelect() local
2307 if (!X86FastEmitCompare(CmpLHS, CmpRHS, CmpVT, CI->getDebugLoc())) in X86FastEmitPseudoSelect()
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| H A D | X86ISelLowering.cpp | 21872 if (VecVT != CmpVT) in emitOrXorXorTree()
21881 if (VecVT != CmpVT) in emitOrXorXorTree()
21953 CmpVT = MVT::v64i1; in combineVectorSizedSetCCEquality()
21958 CmpVT = MVT::v16i1; in combineVectorSizedSetCCEquality()
22002 if (VecVT != CmpVT) { in combineVectorSizedSetCCEquality()
22011 if (VecVT != CmpVT) { in combineVectorSizedSetCCEquality()
22536 assert((CmpVT == MVT::i8 || CmpVT == MVT::i16 || in EmitCmp()
22537 CmpVT == MVT::i32 || CmpVT == MVT::i64) && "Unexpected VT!"); in EmitCmp()
22562 CmpVT = MVT::i32; in EmitCmp()
22574 CmpVT = MVT::i32; in EmitCmp()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6776 EVT CmpVT; in LowerVSETCC() local
6778 CmpVT = Op0.getValueType().changeVectorElementTypeToInteger(); in LowerVSETCC()
6791 CmpVT = VT; in LowerVSETCC()
6798 unsigned CmpElements = CmpVT.getVectorNumElements() * 2; in LowerVSETCC()
6806 Merged = DAG.getNode(ISD::BITCAST, dl, CmpVT, Merged); in LowerVSETCC()
6808 Merged = DAG.getNOT(dl, Merged, CmpVT); in LowerVSETCC()
6813 if (CmpVT.getVectorElementType() == MVT::i64) in LowerVSETCC()
6844 SDValue TmpOp0 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op1, Op0, in LowerVSETCC()
6846 SDValue TmpOp1 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6929 Result = DAG.getNode(ARMISD::VCMPZ, dl, CmpVT, Op0, in LowerVSETCC()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 14050 CmpVT = MVT::v4i32; in LowerVSETCC()
14066 EmitVectorComparison(LHS, RHS, CC1, NoNaNs, CmpVT, dl, DAG); in LowerVSETCC()
14076 Cmp = DAG.getNode(ISD::OR, dl, CmpVT, Cmp, Cmp2); in LowerVSETCC()
18657 EVT CmpVT = InfoAndKind.IsAArch64 in performSetccAddFolding() local
18660 if (CmpVT != MVT::i32 && CmpVT != MVT::i64) in performSetccAddFolding()
19785 EVT CmpVT = N->getOperand(2).getValueType(); in tryConvertSVEWideCompare() local
22813 EVT CmpVT = N0.getOperand(0).getValueType(); in performVSelectCombine() local
22817 CmpVT.getVectorElementType().isFloatingPoint()) in performVSelectCombine()
22823 if (ResVT.getSizeInBits() != CmpVT.getSizeInBits()) in performVSelectCombine()
26325 EVT CmpVT = Pg.getValueType(); in LowerFixedLengthVectorSetccToSVE() local
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 8040 EVT CmpVT = Op.getOperand(0).getValueType(); in LowerSELECT_CC() local
8048 if (!Subtarget.hasP9Vector() && CmpVT == MVT::f128) { in LowerSELECT_CC()
8050 dl, getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), CmpVT), in LowerSELECT_CC()
8057 if (!CmpVT.isFloatingPoint() || !TV.getValueType().isFloatingPoint() || in LowerSELECT_CC()
8132 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags); in LowerSELECT_CC()
8142 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags); in LowerSELECT_CC()
8148 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, Flags); in LowerSELECT_CC()
8154 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, RHS, LHS, Flags); in LowerSELECT_CC()
8160 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, RHS, LHS, Flags); in LowerSELECT_CC()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 4101 EVT CmpVT = Tmp1.getValueType(); in ExpandNode() local
4105 EVT CCVT = getSetCCResultType(CmpVT); in ExpandNode()
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| H A D | SelectionDAGBuilder.cpp | 8557 EVT CmpVT = EVT::getIntegerVT(LHS->getContext(), LoadVT.getSizeInBits()); in visitMemCmpBCmpCall() local
8558 LoadL = DAG.getBitcast(CmpVT, LoadL); in visitMemCmpBCmpCall()
8559 LoadR = DAG.getBitcast(CmpVT, LoadR); in visitMemCmpBCmpCall()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 5793 EVT CmpVT = LHS.getValueType(); in lowerICMPIntrinsic() local
5794 if (CmpVT == MVT::i16 && !TLI.isTypeLegal(MVT::i16)) { in lowerICMPIntrinsic()
5823 EVT CmpVT = Src0.getValueType(); in lowerFCMPIntrinsic() local
5826 if (CmpVT == MVT::f16 && !TLI.isTypeLegal(CmpVT)) { in lowerFCMPIntrinsic()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 6487 EVT CmpVT = Tmp1.getValueType(); in LowerOperation() local
6489 getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), CmpVT); in LowerOperation()
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