| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVMacroFusion.td | 19 CheckOpcode<[LUI]>,
28 CheckOpcode<[AUIPC]>,
29 CheckOpcode<[ADDI]>>;
38 CheckOpcode<[SLLI]>,
43 CheckOpcode<[SRLI]>,
55 CheckOpcode<[SLLI]>,
60 CheckOpcode<[SRLI]>,
73 CheckOpcode<[SLLI]>,
78 CheckOpcode<[SRLI]>,
88 CheckOpcode<[ADD]>,
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedPredNeoverse.td | 38 CheckAll<[CheckOpcode<[
51 CheckAll<[CheckOpcode<
62 CheckAll<[CheckOpcode<[MOVZWi, MOVZXi]>,
69 CheckAll<[CheckOpcode<[ORRWrs, ORRXrs]>,
76 CheckAll<[CheckOpcode<[FMOVWHr, FMOVXHr,
81 CheckAll<[CheckOpcode<[MOVID, MOVIv2d_ns]>,
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| H A D | AArch64SchedPredicates.td | 94 def IsArithExtOp : CheckOpcode<[ADDWrx, ADDXrx, ADDSWrx, ADDSXrx,
100 def IsArithImmOp : CheckOpcode<[ADDWri, ADDXri, ADDSWri, ADDSXri,
104 def IsArithShiftOp : CheckOpcode<[ADDWrs, ADDXrs, ADDSWrs, ADDSXrs,
108 def IsArithUnshiftOp : CheckOpcode<[ADDWrr, ADDXrr, ADDSWrr, ADDSXrr,
112 def IsLogicImmOp : CheckOpcode<[ANDWri, ANDXri,
117 def IsLogicShiftOp : CheckOpcode<[ANDWrs, ANDXrs, ANDSWrs, ANDSXrs,
125 def IsLogicUnshiftOp : CheckOpcode<[ANDWrr, ANDXrr, ANDSWrr, ANDSXrr,
133 def IsArithLogicImmOp : CheckOpcode<!listconcat(IsArithImmOp.ValidOpcodes,
201 def IsLoadRegOffsetOp : CheckOpcode<[PRFMroW, PRFMroX,
217 def IsStoreRegOffsetOp : CheckOpcode<[STRBBroW, STRBBroX,
[all …]
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| H A D | AArch64SchedPredExynos.td | 29 CheckAll<[CheckOpcode<[BLR]>,
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86SchedPredicates.td | 94 def IsRegRegCompareAndSwap_8 : CheckOpcode<[ CMPXCHG8rr ]>;
96 def IsRegMemCompareAndSwap_8 : CheckOpcode<[
100 def IsRegRegCompareAndSwap_16_32_64 : CheckOpcode<[
104 def IsRegMemCompareAndSwap_16_32_64 : CheckOpcode<[
110 def IsCompareAndSwap8B : CheckOpcode<[ CMPXCHG8B, LCMPXCHG8B ]>;
111 def IsCompareAndSwap16B : CheckOpcode<[ CMPXCHG16B, LCMPXCHG16B ]>;
113 def IsRegMemCompareAndSwap : CheckOpcode<
119 def IsRegRegCompareAndSwap : CheckOpcode<
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCSchedPredicates.td | 15 CheckOpcode<[FADD,
208 CheckOpcode<[CFUGED,
232 CheckOpcode<[PMXVBF16GER2,
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| /freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | DAGISelMatcherOpt.cpp | 149 Matcher *CheckOpcode = CheckType->takeNext(); in ContractNodes() local
150 Matcher *Tail = CheckOpcode->takeNext(); in ContractNodes()
153 MatcherPtr.reset(CheckOpcode); in ContractNodes()
154 CheckOpcode->setNext(CheckType); in ContractNodes()
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| H A D | DAGISelMatcher.h | 70 CheckOpcode, // Fail if not opcode. enumerator
138 case CheckOpcode: in isSimplePredicateNode()
486 : Matcher(CheckOpcode), Opcode(opcode) {} in CheckOpcodeMatcher()
491 return N->getKind() == CheckOpcode; in classof()
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| H A D | DAGISelMatcherEmitter.cpp | 576 case Matcher::CheckOpcode: in EmitMatcher()
1227 case Matcher::CheckOpcode: in getOpcodeString()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetInstrPredicate.td | 17 // CheckOpcode<[BLR]>,
30 // example, `CheckOpcode` is a special type of predicate used to describe a
61 // For example, a `CheckOpcode` predicate is expanded using method
201 // is not a member of the set is by using a `CheckNot<CheckOpcode<[...]>>`
203 class CheckOpcode<list<Instruction> Opcodes> : MCInstPredicate {
210 class CheckPseudo<list<Instruction> Opcodes> : CheckOpcode<Opcodes>;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGISel.cpp | 2725 CheckOpcode(const unsigned char *MatcherTable, unsigned &MatcherIndex, in CheckOpcode() function
2886 Result = !::CheckOpcode(Table, Index, N.getNode()); in IsPredicateKnownToFail()
3428 if (!::CheckOpcode(MatcherTable, MatcherIndex, N.getNode())) break; in SelectCodeCommon()
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