Home
last modified time | relevance | path

Searched refs:CTTZ (Results 1 – 25 of 39) sorted by relevance

12

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp3423 { ISD::CTTZ, MVT::v8i64, { 2, 8, 6, 7 } }, in getIntrinsicInstrCost()
3424 { ISD::CTTZ, MVT::v16i32, { 2, 8, 6, 7 } }, in getIntrinsicInstrCost()
3425 { ISD::CTTZ, MVT::v4i64, { 1, 8, 6, 6 } }, in getIntrinsicInstrCost()
3426 { ISD::CTTZ, MVT::v8i32, { 1, 8, 6, 6 } }, in getIntrinsicInstrCost()
3872 { ISD::CTTZ, MVT::v16i8, { 11, 16, 13, 19 } } in getIntrinsicInstrCost()
3934 { ISD::CTTZ, MVT::i64, { 1 } }, in getIntrinsicInstrCost()
3937 { ISD::CTTZ, MVT::i32, { 1 } }, in getIntrinsicInstrCost()
3938 { ISD::CTTZ, MVT::i16, { 1 } }, in getIntrinsicInstrCost()
3939 { ISD::CTTZ, MVT::i8, { 1 } }, in getIntrinsicInstrCost()
4060 ISD = ISD::CTTZ; in getIntrinsicInstrCost()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCExpandPseudos.cpp150 case ARC::CTTZ: in runOnMachineFunction()
H A DARCISelLowering.cpp172 setOperationAction(ISD::CTTZ, MVT::i32, Legal); in ARCTargetLowering()
H A DARCInstrInfo.td143 def CTTZ : PseudoInstARC<(outs GPR32:$A),
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h715 CTTZ, enumerator
H A DBasicTTIImpl.h2230 ISD = ISD::CTTZ; in getTypeBasedIntrinsicInstrCost()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp104 setOperationAction(ISD::CTTZ, MVT::i8, Expand); in MSP430TargetLowering()
105 setOperationAction(ISD::CTTZ, MVT::i16, Expand); in MSP430TargetLowering()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp454 case ISD::CTTZ: return "cttz"; in getOperationName()
H A DLegalizeVectorOps.cpp370 case ISD::CTTZ: in LegalizeOp()
1004 case ISD::CTTZ: in Expand()
H A DLegalizeIntegerTypes.cpp78 case ISD::CTTZ: Res = PromoteIntRes_CTTZ(N); break; in PromoteIntegerResult()
669 !TLI.isOperationLegalOrCustomOrPromote(ISD::CTTZ, NVT) && in PromoteIntRes_CTTZ()
679 if (N->getOpcode() == ISD::CTTZ || N->getOpcode() == ISD::VP_CTTZ) { in PromoteIntRes_CTTZ()
685 if (N->getOpcode() == ISD::CTTZ) in PromoteIntRes_CTTZ()
2633 case ISD::CTTZ: ExpandIntRes_CTTZ(N, Lo, Hi); break; in ExpandIntegerResult()
H A DLegalizeDAG.cpp3018 case ISD::CTTZ: in ExpandNode()
4956 case ISD::CTTZ: in PromoteNode()
4962 if (Node->getOpcode() == ISD::CTTZ || in PromoteNode()
4968 if (Node->getOpcode() == ISD::CTTZ) { in PromoteNode()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1868 setOperationAction(ISD::CTTZ, VT, Custom); in addTypeForFixedLengthSVE()
6378 case ISD::CTTZ: in LowerOperation()
22261 SDValue Zero, CTTZ; in foldCSELofCTTZ() local
22265 CTTZ = N->getOperand(1); in foldCSELofCTTZ()
22268 CTTZ = N->getOperand(0); in foldCSELofCTTZ()
22272 if ((CTTZ.getOpcode() != ISD::CTTZ && CTTZ.getOpcode() != ISD::TRUNCATE) || in foldCSELofCTTZ()
22273 (CTTZ.getOpcode() == ISD::TRUNCATE && in foldCSELofCTTZ()
22274 CTTZ.getOperand(0).getOpcode() != ISD::CTTZ)) in foldCSELofCTTZ()
22277 assert((CTTZ.getValueType() == MVT::i32 || CTTZ.getValueType() == MVT::i64) && in foldCSELofCTTZ()
22285 : CTTZ.getOperand(0); in foldCSELofCTTZ()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp242 setOperationAction(ISD::CTTZ, MVT::v16i8, Expand); in WebAssemblyTargetLowering()
245 for (auto Op : {ISD::CTLZ, ISD::CTTZ, ISD::CTPOP}) in WebAssemblyTargetLowering()
1491 case ISD::CTTZ: in LowerOperation()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp128 setOperationAction(ISD::CTTZ, MVT::i64, Custom); in BPFTargetLowering()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp520 ISD::BITREVERSE, ISD::CTLZ, ISD::CTPOP, ISD::CTTZ, in NVPTXTargetLowering()
712 setOperationAction(ISD::CTTZ, MVT::i16, Expand); in NVPTXTargetLowering()
713 setOperationAction(ISD::CTTZ, MVT::v2i16, Expand); in NVPTXTargetLowering()
714 setOperationAction(ISD::CTTZ, MVT::i32, Expand); in NVPTXTargetLowering()
715 setOperationAction(ISD::CTTZ, MVT::i64, Expand); in NVPTXTargetLowering()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/
H A DVPIntrinsics.def279 VP_PROPERTY_FUNCTIONAL_SDOPC(CTTZ)
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp220 setOperationAction(ISD::CTTZ, T, Custom); in initializeHVXLowering()
294 setOperationAction(ISD::CTTZ, T, Custom); in initializeHVXLowering()
3164 case ISD::CTTZ: in LowerHvxOperation()
3214 case ISD::CTTZ: return LowerHvxCttz(Op, DAG); in LowerHvxOperation()
H A DHexagonISelLowering.cpp1560 setOperationAction(ISD::CTTZ, MVT::i8, Promote); in HexagonTargetLowering()
1561 setOperationAction(ISD::CTTZ, MVT::i16, Promote); in HexagonTargetLowering()
1631 ISD::CTPOP, ISD::CTLZ, ISD::CTTZ, ISD::BSWAP, ISD::BITREVERSE, in HexagonTargetLowering()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp421 setOperationAction({ISD::BSWAP, ISD::CTTZ, ISD::CTLZ}, VT, Expand); in AMDGPUTargetLowering()
446 {ISD::CTTZ, ISD::CTTZ_ZERO_UNDEF, ISD::CTLZ, ISD::CTLZ_ZERO_UNDEF}, in AMDGPUTargetLowering()
468 ISD::CTTZ, ISD::CTLZ, ISD::VECTOR_SHUFFLE, in AMDGPUTargetLowering()
1365 case ISD::CTTZ: in LowerOperation()
3072 return Opc == ISD::CTTZ || Opc == ISD::CTTZ_ZERO_UNDEF; in isCttzOpc()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp377 setOperationAction(ISD::CTTZ, MVT::i32, Legal); in RISCVTargetLowering()
382 setOperationAction({ISD::CTTZ, ISD::CTPOP}, XLenVT, Expand); in RISCVTargetLowering()
384 setOperationAction({ISD::CTTZ, ISD::CTPOP}, MVT::i32, Expand); in RISCVTargetLowering()
882 setOperationAction({ISD::CTLZ, ISD::CTTZ, ISD::CTPOP}, VT, Expand); in RISCVTargetLowering()
5574 OP_CASE(CTTZ) in getRISCVVLOp()
5625 VP_CASE(CTTZ) // VP_CTTZ in getRISCVVLOp()
6594 case ISD::CTTZ: in LowerOperation()
6598 assert(Op.getOpcode() != ISD::CTTZ); in LowerOperation()
11604 case ISD::CTTZ: in ReplaceNodeResults()
14608 if (CountZeroes.getOpcode() != ISD::CTTZ && in foldSelectOfCTTZOrCTLZ()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp128 setOperationAction(ISD::CTTZ, MVT::i32, Legal); in LanaiTargetLowering()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp105 setOperationAction(ISD::CTTZ, MVT::i32, Expand); in CSKYTargetLowering()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp131 setOperationAction(ISD::CTTZ, MVT::i32, Custom); in LoongArchTargetLowering()
1656 case ISD::CTTZ: in getLoongArchWOpcode()
1925 case ISD::CTTZ: { in ReplaceNodeResults()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1755 setOperationAction(ISD::CTTZ , MVT::i64, Expand); in SparcTargetLowering()
1823 setOperationAction(ISD::CTTZ , MVT::i32, Expand); in SparcTargetLowering()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp268 setOperationAction(ISD::CTTZ, VT, Custom); in addMVEVectorTypes()
971 setOperationAction(ISD::CTTZ, MVT::v8i8, Custom); in ARMTargetLowering()
972 setOperationAction(ISD::CTTZ, MVT::v4i16, Custom); in ARMTargetLowering()
973 setOperationAction(ISD::CTTZ, MVT::v2i32, Custom); in ARMTargetLowering()
974 setOperationAction(ISD::CTTZ, MVT::v1i64, Custom); in ARMTargetLowering()
976 setOperationAction(ISD::CTTZ, MVT::v16i8, Custom); in ARMTargetLowering()
977 setOperationAction(ISD::CTTZ, MVT::v8i16, Custom); in ARMTargetLowering()
978 setOperationAction(ISD::CTTZ, MVT::v4i32, Custom); in ARMTargetLowering()
979 setOperationAction(ISD::CTTZ, MVT::v2i64, Custom); in ARMTargetLowering()
1199 setOperationAction(ISD::CTTZ, MVT::i32, Custom); in ARMTargetLowering()
[all …]

12