| /freebsd-14.2/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | riscv,cpu-intc.txt | 4 RISC-V cores include Control Status Registers (CSRs) which are local to each 6 Some of these CSRs are used to control local interrupts connected to the core. 40 definition of the hart whose CSRs control these local interrupts.
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/pci/ |
| H A D | snps,dw-pcie-ep.yaml | 47 with all spaces. Note iATU/eDMA CSRs are indirectly accessible 73 set of viewport CSRs mapped into the PL space. Note iATU is 79 CSRs mapped in a non-standard base address. The registers offset 86 PCS and PHY CSRs accessible over a dedicated memory mapped
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| H A D | snps,dw-pcie.yaml | 47 with all spaces. Note iATU/eDMA CSRs are indirectly accessible 73 set of viewport CSRs mapped into the PL space. Note iATU is 79 CSRs mapped in a non-standard base address. The registers offset 86 PCS and PHY CSRs accessible over a dedicated memory mapped
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| H A D | snps,dw-pcie-common.yaml | 79 basically the set of the controller CSRs.
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVSystemOperands.td | 74 // User Floating-Point CSRs 330 // User Vector CSRs 367 // Machine-level CSRs 382 // Supervisor-level CSRs 392 // Hypervisor and VS CSRs
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| H A D | RISCVFeatures.td | 64 "'zicsr' (CSRs)">; 67 "'Zicsr' (CSRs)">;
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/soc/litex/ |
| H A D | litex,soc-controller.yaml | 13 operations and provide functions for other drivers to read/write CSRs
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | snps,dw-umctl2-ddrc.yaml | 61 A standard set of the clock sources contains CSRs bus clock, AXI-ports
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallingConv.td | 339 // the order of CSRs in CSR_iOS. 343 // CSRs that are handled by prologue, epilogue. 346 // CSRs that are handled explicitly via copies.
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineRegisterInfo.cpp | 632 void MachineRegisterInfo::setCalleeSavedRegs(ArrayRef<MCPhysReg> CSRs) { in setCalleeSavedRegs() argument 636 append_range(UpdatedCSRs, CSRs); in setCalleeSavedRegs()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.cpp | 194 const MCPhysReg *CSRs = getCalleeSavedRegs(&MF); in UpdateCustomCalleeSavedRegs() local 196 for (const MCPhysReg *I = CSRs; *I; ++I) in UpdateCustomCalleeSavedRegs()
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| H A D | AArch64CallingConvention.td | 666 // CSRs that are handled by prologue, epilogue. 670 // CSRs that are handled explicitly via copies.
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| H A D | AArch64InstrInfo.td | 4859 // Save CSRs in order, {FPOffset} 4861 // Restore CSRs in order
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| /freebsd-14.2/crypto/openssl/ |
| H A D | README.md | 48 - creation of X.509 certificates, CSRs and CRLs
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallingConv.td | 134 // The CSRs & scratch-registers are interleaved at a split boundary of 8.
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineRegisterInfo.h | 268 void setCalleeSavedRegs(ArrayRef<MCPhysReg> CSRs);
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.td | 1144 // CSRs that are handled by prologue, epilogue. 1147 // CSRs that are handled explicitly via copies.
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| /freebsd-14.2/crypto/openssl/doc/man1/ |
| H A D | openssl.pod | 28 o Creation of X.509 certificates, CSRs and CRLs
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| H A D | openssl-req.pod.in | 61 This command primarily creates and processes certificate requests (CSRs)
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| H A D | openssl-ca.pod.in | 73 It can be used to sign certificate requests (CSRs) in a variety of forms
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| /freebsd-14.2/crypto/heimdal/doc/ |
| H A D | hx509.texi | 439 @c section which explains CSRs as well?
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.td | 320 // On AIX, CSRs are allocated starting from R31 according to:
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