Searched refs:CSEL (Results 1 – 15 of 15) sorted by relevance
| /freebsd-14.2/sys/dev/sym/ |
| H A D | sym_defs.h | 303 #define CSEL 0x10 /* r/w: SCSI-SEL */ macro
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2141 case AArch64ISD::CSEL: { in computeKnownBitsForTargetNode() 2365 MAKE_CASE(AArch64ISD::CSEL) in getTargetNodeName() 9549 unsigned Opcode = AArch64ISD::CSEL; in LowerSELECT_CC() 9627 if (Opcode != AArch64ISD::CSEL) { in LowerSELECT_CC() 17576 CSel1.getOpcode() != AArch64ISD::CSEL) in performANDORCSELCombine() 18593 if (Op.getOpcode() != AArch64ISD::CSEL) in isSetCC() 18731 if (LHS.getOpcode() != AArch64ISD::CSEL && in performAddCSelIntoCSinc() 18921 if (Op.getOpcode() != AArch64ISD::CSEL) in getCSETCondCode() 22466 SDValue CSEL = in performSETCCCombine() local 22470 return DAG.getZExtOrTrunc(CSEL, DL, VT); in performSETCCCombine() [all …]
|
| H A D | AArch64SchedThunderX2T99.td | 434 "CCMP(W|X)(i|r)", "CSEL(W|X)r", 456 "CCMP(W|X)(i|r)", "CSEL(W|X)r", 475 "CCMP(W|X)(i|r)", "CSEL(W|X)r",
|
| H A D | AArch64SchedThunderX3T110.td | 694 "CCMP(W|X)(i|r)", "CSEL(W|X)r", 716 "CCMP(W|X)(i|r)", "CSEL(W|X)r", 735 "CCMP(W|X)(i|r)", "CSEL(W|X)r",
|
| H A D | AArch64ISelLowering.h | 82 CSEL, enumerator
|
| H A D | AArch64SchedA64FX.td | 610 "CCMP(W|X)(i|r)", "CSEL(W|X)r", 630 "CCMP(W|X)(i|r)", "CSEL(W|X)r", 647 "CCMP(W|X)(i|r)", "CSEL(W|X)r",
|
| H A D | AArch64SchedCyclone.td | 149 // CSEL,CSINC,CSINV,CSNEG
|
| H A D | AArch64SchedTSV110.td | 404 def : InstRW<[TSV110Wr_1cyc_1ALUAB], (instregex "^(CSEL|CSINC|CSINV|CSNEG)(W|X)r$")>;
|
| H A D | AArch64SchedAmpere1.td | 952 (instregex "(CSEL|CSINC|CSINV|CSNEG)(X|W)")>;
|
| H A D | AArch64SchedAmpere1B.td | 934 (instregex "(CSEL|CSINC|CSINV|CSNEG)(X|W)")>;
|
| H A D | AArch64SchedFalkorDetails.td | 894 def : InstRW<[FalkorWr_1XYZ_1cyc], (instregex "^(CSEL|CSINC|CSINV|CSNEG)(W|X)r$")>;
|
| H A D | AArch64SchedKryoDetails.td | 543 (instregex "CSEL(W|X)r")>;
|
| H A D | AArch64InstrInfo.td | 662 def AArch64csel : SDNode<"AArch64ISD::CSEL", SDT_AArch64CSel>; 2673 defm CSEL : CondSelect<0, 0b00, "csel">; 4807 // CSEL instructions providing f128 types need to be handled by a
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleM85.td | 556 (instregex "t2(CSEL|CSINC|CSINV|CSNEG)")>;
|
| H A D | ARMInstrThumb2.td | 426 // CSEL aliases inverted predicate 758 // CSEL). Setting Unpredictable{15} = 1 here would reintroduce
|