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/freebsd-14.2/sys/contrib/device-tree/Bindings/arm/cpu-enable-method/
H A Dal,alpine-smp6 enabling secondary CPUs. To apply to all CPUs, a single
12 Compatible CPUs: "arm,cortex-a15"
33 system fabric, like powering CPUs off.
H A Dmarvell,berlin-smp6 CPUs. To apply to all CPUs, a single "marvell,berlin-smp" enable method should
11 Compatible CPUs: "marvell,pj4b" and "arm,cortex-a9"
H A Dnuvoton,npcm750-smp5 To apply to all CPUs, a single "nuvoton,npcm750-smp" enable method should be
10 Compatible CPUs: "arm,cortex-a9"
/freebsd-14.2/sys/contrib/device-tree/Bindings/mips/brcm/
H A Dbrcm,bmips.txt1 * Broadcom MIPS (BMIPS) CPUs
7 - mips-hpt-frequency: This is common to all CPUs in the system so it lives
/freebsd-14.2/sys/i386/conf/
H A DNOTES21 # HTT CPUs should only be used if they are enabled in the BIOS. For
22 # the ACPI case, ACPI only correctly tells us about any HTT CPUs if
23 # they are enabled. However, most HTT systems do not list HTT CPUs
24 # in the MP Table if they are enabled, thus we guess at the HTT CPUs
26 # these CPUs if HTT is disabled. Thus, HTT guessing is only enabled
38 options MPTABLE_FORCE_HTT # Enable HTT CPUs with the MP Table
46 # deleting the specification for CPUs you don't need to use may make
70 # of Cyrix 6x86 and 6x86MX CPUs by setting the NO_LOCK bit of CCR1.
110 # Pro BIOSs do not enable L2 cache of Mendocino Celeron CPUs.
122 # K5/K6/K6-2 CPUs.
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,msm8996-apcc.yaml7 title: Qualcomm clock controller for MSM8996 CPUs
13 Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for Power cluster
H A Dclps711x-clock.txt1 * Clock bindings for the Cirrus Logic CLPS711X CPUs
/freebsd-14.2/sys/contrib/device-tree/Bindings/arm/
H A Dpmu.yaml68 # Don't know how many CPUs, so no constraints to specify
81 nodes corresponding to the set of CPUs which have
105 not valid for non-ARMv7 CPUs or ARMv7 CPUs booting Linux
H A Dcpu-capacity.txt2 ARM CPUs capacity bindings
18 CPU capacity is a number that provides the scheduler information about CPUs
20 (e.g., ARM big.LITTLE systems) or maximum frequency at which CPUs can run
23 capture a first-order approximation of the relative performance of CPUs.
237 [1] ARM Linux Kernel documentation - CPUs bindings
H A Dcci.txt21 root node (ie from CPUs perspective as per DT standard).
127 (inclusive of CPUs and their cpu nodes).
223 CCI slave interface @0x000000002c094000 is connected to CPUs {CPU0, CPU1};
224 CCI slave interface @0x000000002c095000 is connected to CPUs {CPU2, CPU3};
H A Dspe-pmu.txt12 SPE is only supported on a subset of the CPUs, please consult
H A Dcci-control-port.yaml13 Masters in the device tree connected to a CCI port (inclusive of CPUs
/freebsd-14.2/share/examples/perfmon/
H A DREADME2 counters on Pentium and Pentium Pro CPUs. See perfmon(4) for a
15 The following options are not implemented on Pentium CPUs:
/freebsd-14.2/sys/contrib/device-tree/Bindings/mips/ingenic/
H A Dingenic,cpu.yaml7 title: Bindings for Ingenic XBurst family CPUs
13 Ingenic XBurst family CPUs shall have the following properties.
/freebsd-14.2/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Darm,gic-v3.yaml60 The 4th cell is a phandle to a node describing a set of CPUs this
81 GICC, GICH and GICV are optional, but must be described if the CPUs
82 support them. Examples of such CPUs are ARM's implementations of the
191 used to route Message Signalled Interrupts (MSI) to the CPUs.
266 <0x2d000000 0x800000>, // GICR 1: CPUs 0-31
267 <0x2e000000 0x800000>, // GICR 2: CPUs 32-63
/freebsd-14.2/contrib/llvm-project/compiler-rt/lib/scudo/standalone/
H A Dlinux.cpp162 cpu_set_t CPUs; in getNumberOfCPUs() local
165 if (sched_getaffinity(0, sizeof(cpu_set_t), &CPUs) != 0) in getNumberOfCPUs()
167 return static_cast<u32>(CPU_COUNT(&CPUs)); in getNumberOfCPUs()
/freebsd-14.2/sys/contrib/device-tree/Bindings/powerpc/fsl/
H A Dcpus.txt5 Power Architecture CPUs in Freescale SOCs are represented in device trees as
18 Power CPUs. The EREF defines some architecture categories not defined
/freebsd-14.2/sys/contrib/device-tree/Bindings/mips/
H A Dcpus.yaml7 title: MIPS CPUs
14 The device tree allows to describe the layout of CPUs in a system through
/freebsd-14.2/sys/contrib/device-tree/Bindings/cpu/
H A Dcpu-capacity.txt18 CPU capacity is a number that provides the scheduler information about CPUs
20 (e.g., ARM big.LITTLE systems) or maximum frequency at which CPUs can run
23 capture a first-order approximation of the relative performance of CPUs.
237 [1] ARM Linux Kernel documentation - CPUs bindings
H A Dcpu-topology.txt9 In a SMP system, the hierarchy of CPUs is defined through three entities that
10 are used to describe the layout of physical CPUs in the system:
20 For instance in a system where CPUs support SMT, "cpu" nodes represent all
33 correspond to physical CPUs and are to be mapped to the hierarchy levels.
48 Usage: Optional - On SMP systems provide CPUs topology to the OS.
154 If a core node is not a leaf node (CPUs supporting SMT) a core node's
/freebsd-14.2/sys/contrib/device-tree/Bindings/timer/
H A Dsnps,archs-rtc.txt1 Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
H A Dsnps,archs-gfrc.txt1 Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
/freebsd-14.2/sys/contrib/device-tree/Bindings/dvfs/
H A Dperformance-domain.yaml14 CPUs that run in the same performance domain. Performance domains must not
20 that domain. For example, a set of CPUs that share a voltage domain, and
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SchedPredicates.td65 // on recent Intel CPUs.
77 // on recent Intel CPUs.
/freebsd-14.2/sys/contrib/device-tree/Bindings/cpufreq/
H A Dcpufreq-spear.txt6 which share clock across all CPUs.

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