1 /*-
2 * Copyright (c) 2020 Justin Hibbits
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25
26 #include <sys/cdefs.h>
27 #include <sys/param.h>
28 #include <sys/systm.h>
29 #include <sys/conf.h>
30 #include <sys/kernel.h>
31 #include <sys/bus.h>
32 #include <sys/limits.h>
33 #include <sys/module.h>
34 #include <sys/malloc.h>
35 #include <sys/mutex.h>
36 #include <sys/rman.h>
37 #include <sys/sysctl.h>
38
39 #include <machine/bus.h>
40
41 #include <dev/ofw/ofw_bus.h>
42 #include <dev/ofw/ofw_bus_subr.h>
43
44 #include <sys/kdb.h>
45
46 #include "cpld.h"
47
48 /*
49 * A driver for the AmigaOne A1222 "Tabor" Main CPLD.
50 *
51 * The main CPLD is the interface between the CPU and the GPIO CPLD.
52 * Communication with the GPIO CPLD is over the main CPLD's mailbox interface,
53 * along with the dual-port RAM on the CPLD.
54 *
55 * Only one process can open the CPLD character device at a time. The driver
56 * enforces this to simplify the communication protocol.
57 */
58
59 /* Resource access addresses. */
60 #define CPLD_MEM_ADDR_H 0x00
61 #define CPLD_MEM_ADDR_L 0x01
62 #define CPLD_MEM_DATA 0x80
63
64 #define CPLD_MAX_DRAM_WORDS 0x800
65
66 /* CPLD Registers. */
67 #define CPLD_REG_SIG1 0x00
68 #define CPLD_REG_SIG2 0x01
69 #define CPLD_REG_HWREV 0x02
70 #define CPLD_REG_CPLDREV 0x03
71 #define CPLD_REG_MBC2X 0x04
72 #define CPLD_REG_MBX2C 0x05
73 #define CPLD_REG_FAN1_TACHO_U 0x10
74 #define CPLD_REG_FAN1_TACHO_L 0x11
75 #define CPLD_REG_FAN2_TACHO_U 0x12
76 #define CPLD_REG_FAN2_TACHO_L 0x13
77 #define CPLD_REG_FAN3_TACHO_U 0x14
78 #define CPLD_REG_FAN3_TACHO_L 0x15
79 #define CPLD_REG_DATE_UU 0x20
80 #define CPLD_REG_DATE_UL 0x21
81 #define CPLD_REG_DATE_LU 0x22
82 #define CPLD_REG_DATE_LL 0x23
83 #define CPLD_REG_TIME_UU 0x24
84 #define CPLD_REG_TIME_UL 0x25
85 #define CPLD_REG_TIME_LU 0x26
86 #define CPLD_REG_TIME_LL 0x27
87 #define CPLD_REG_SCR1 0x5c
88 #define CPLD_REG_SCR2 0x6a
89 #define CPLD_REG_RAM 0x80
90
91 struct cpld_softc {
92 device_t sc_dev;
93 struct resource *sc_mem;
94 struct cdev *sc_cdev;
95 struct mtx sc_mutex;
96 bool sc_isopen;
97 };
98
99 static d_open_t cpld_open;
100 static d_close_t cpld_close;
101 static d_ioctl_t cpld_ioctl;
102
103 static struct cdevsw cpld_cdevsw = {
104 .d_version = D_VERSION,
105 .d_open = cpld_open,
106 .d_close = cpld_close,
107 .d_ioctl = cpld_ioctl,
108 .d_name = "nvram",
109 };
110
111 static device_probe_t cpld_probe;
112 static device_attach_t cpld_attach;
113 static int cpld_fan_sysctl(SYSCTL_HANDLER_ARGS);
114
115 static device_method_t cpld_methods[] = {
116 DEVMETHOD(device_probe, cpld_probe),
117 DEVMETHOD(device_attach, cpld_attach),
118
119 DEVMETHOD_END
120 };
121
122 static driver_t cpld_driver = {
123 "cpld",
124 cpld_methods,
125 sizeof(struct cpld_softc)
126 };
127
128 DRIVER_MODULE(cpld, lbc, cpld_driver, 0, 0);
129
130 static void
cpld_write(struct cpld_softc * sc,int addr,int data)131 cpld_write(struct cpld_softc *sc, int addr, int data)
132 {
133 if (addr >= CPLD_REG_RAM) {
134 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
135 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_L, addr);
136 } else
137 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
138 bus_write_1(sc->sc_mem, CPLD_MEM_DATA, data);
139 }
140
141 static int
cpld_read(struct cpld_softc * sc,int addr)142 cpld_read(struct cpld_softc *sc, int addr)
143 {
144 if (addr >= CPLD_REG_RAM) {
145 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
146 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_L, addr);
147 } else
148 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
149
150 return (bus_read_1(sc->sc_mem, CPLD_MEM_DATA));
151 }
152
153 /*
154 * This is only to read a register that's split into two 8-bit registers.
155 * Dual-port RAM is not accepted for this purpose.
156 */
157 static int
cpld_read_pair(struct cpld_softc * sc,int addr)158 cpld_read_pair(struct cpld_softc *sc, int addr)
159 {
160 int tmp;
161
162 KASSERT(addr <= 0xff, ("Invalid register-pair base address %x.", addr));
163 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);
164 tmp = bus_read_1(sc->sc_mem, CPLD_MEM_DATA) << 8;
165
166 bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr + 1);
167 tmp |= bus_read_1(sc->sc_mem, CPLD_MEM_DATA);
168
169 return (tmp);
170 }
171
172 static int
cpld_probe(device_t dev)173 cpld_probe(device_t dev)
174 {
175 if (!ofw_bus_is_compatible(dev, "aeon,tabor-cpld"))
176 return (ENXIO);
177
178 device_set_desc(dev, "AmigaOne Tabor CPLD");
179
180 return (BUS_PROBE_GENERIC);
181 }
182
183 static int
cpld_attach(device_t dev)184 cpld_attach(device_t dev)
185 {
186 struct make_dev_args mda;
187 struct cpld_softc *sc;
188 int rid;
189 int date, time, tmp;
190 int err;
191 struct sysctl_ctx_list *ctx;
192 struct sysctl_oid *tree;
193
194 sc = device_get_softc(dev);
195 sc->sc_dev = dev;
196
197 rid = 0;
198 sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
199 RF_ACTIVE|RF_SHAREABLE);
200 if (sc->sc_mem == NULL) {
201 device_printf(dev, "Unable to allocate memory resource.\n");
202 return (ENXIO);
203 }
204 mtx_init(&sc->sc_mutex, "cpld", NULL, MTX_DEF);
205
206 if (bootverbose) {
207 date = (cpld_read_pair(sc, CPLD_REG_DATE_UU) << 16) |
208 cpld_read_pair(sc, CPLD_REG_DATE_LU);
209 time = (cpld_read_pair(sc, CPLD_REG_TIME_UU) << 16) |
210 cpld_read_pair(sc, CPLD_REG_TIME_LU);
211
212 device_printf(dev, "Build date: %04x-%02x-%02x\n",
213 (date >> 16) & 0xffff, (date >> 8) & 0xff, date & 0xff);
214 #if 0
215 /* Build time is nonsense on tested system. */
216 device_printf(dev, "Build time: %02x:%02x:%02x\n",
217 (time >> 16) & 0xff, (time >> 8) & 0xff, time & 0xff);
218 #endif
219 }
220
221 tmp = cpld_read(sc, CPLD_REG_HWREV);
222 device_printf(dev, "Hardware revision: %d\n", tmp);
223
224 ctx = device_get_sysctl_ctx(dev);
225 tree = device_get_sysctl_tree(dev);
226
227 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
228 "cpu_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc,
229 CPLD_REG_FAN1_TACHO_U, cpld_fan_sysctl, "I",
230 "CPU Fan speed in RPM");
231
232 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
233 "case_1_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc,
234 CPLD_REG_FAN2_TACHO_U, cpld_fan_sysctl, "I",
235 "Case fan 1 speed in RPM");
236
237 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
238 "case_2_fan", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_MPSAFE, sc,
239 CPLD_REG_FAN3_TACHO_U, cpld_fan_sysctl, "I",
240 "Case fan 2 speed in RPM");
241
242 make_dev_args_init(&mda);
243 mda.mda_flags = MAKEDEV_CHECKNAME;
244 mda.mda_devsw = &cpld_cdevsw;
245 mda.mda_uid = UID_ROOT;
246 mda.mda_gid = GID_WHEEL;
247 mda.mda_mode = 0660;
248 err = make_dev_s(&mda, &sc->sc_cdev, "cpld");
249 if (err != 0) {
250 device_printf(dev, "Error creating character device: %d\n", err);
251 device_printf(dev, "Only sysctl interfaces will be available.\n");
252 }
253
254 return (0);
255 }
256
257 static int
cpld_fan_sysctl(SYSCTL_HANDLER_ARGS)258 cpld_fan_sysctl(SYSCTL_HANDLER_ARGS)
259 {
260 struct cpld_softc *sc;
261 int error, old, rpm;
262 int fan_reg;
263
264 sc = arg1;
265 fan_reg = arg2;
266 mtx_lock(&sc->sc_mutex);
267 /* Read until we get some level of read stability. */
268 rpm = cpld_read(sc, fan_reg);
269 do {
270 old = rpm;
271 rpm = cpld_read_pair(sc, fan_reg);
272 } while (abs(rpm - old) > 10);
273 mtx_unlock(&sc->sc_mutex);
274
275 /* Convert RPS->RPM. */
276 rpm *= 60;
277 error = sysctl_handle_int(oidp, &rpm, 0, req);
278
279 return (error);
280 }
281
282 static int
cpld_open(struct cdev * dev,int flags,int fmt,struct thread * td)283 cpld_open(struct cdev *dev, int flags, int fmt, struct thread *td)
284 {
285 struct cpld_softc *sc = dev->si_drv1;
286
287 if (sc->sc_isopen)
288 return (EBUSY);
289 sc->sc_isopen = 1;
290 return (0);
291 }
292
293 static int
cpld_close(struct cdev * dev,int fflag,int devtype,struct thread * td)294 cpld_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
295 {
296 struct cpld_softc *sc = dev->si_drv1;
297
298 sc->sc_isopen = 0;
299 return (0);
300 }
301
302 /*
303 * Send a command over the CPLD to the other side.
304 *
305 * This will first copy the data into the dual-port RAM, then signal the other
306 * side by writing to the mailbox.
307 */
308 static int
cpld_send(device_t dev,struct cpld_cmd_data * d)309 cpld_send(device_t dev, struct cpld_cmd_data *d)
310 {
311 struct cpld_softc *sc;
312 uint16_t *word;
313 int i;
314
315 if (d->cmd > USHRT_MAX)
316 return (EINVAL);
317
318 sc = device_get_softc(dev);
319
320 mtx_lock(&sc->sc_mutex);
321 for (i = 0, word = d->words; i < d->len; i++, word++) {
322 if (i == 0)
323 cpld_write(sc, CPLD_REG_RAM + d->offset, *word);
324 else
325 bus_write_4(sc->sc_mem, CPLD_MEM_DATA, *word);
326 }
327
328 cpld_write(sc, CPLD_REG_MBC2X, d->cmd);
329 mtx_unlock(&sc->sc_mutex);
330
331 return (0);
332 }
333
334 static int
cpld_recv(device_t dev,struct cpld_cmd_data * d)335 cpld_recv(device_t dev, struct cpld_cmd_data *d)
336 {
337 struct cpld_softc *sc;
338 uint16_t *word;
339 int i;
340
341 sc = device_get_softc(dev);
342
343 mtx_lock(&sc->sc_mutex);
344 d->cmd = cpld_read(sc, CPLD_REG_MBX2C);
345
346 for (i = 0, word = d->words; i < d->len; i++, word++) {
347 if (i == 0)
348 *word = cpld_read(sc, CPLD_REG_RAM + d->offset);
349 else
350 *word = bus_read_4(sc->sc_mem, CPLD_MEM_DATA);
351 }
352 mtx_unlock(&sc->sc_mutex);
353
354 return (0);
355 }
356
357 static int
cpld_ioctl(struct cdev * dev,u_long cmd,caddr_t data,int fflag,struct thread * td)358 cpld_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
359 struct thread *td)
360 {
361 struct cpld_softc *sc;
362 struct cpld_cmd_data *d;
363 void *xfer_data, *tmp;
364 int err;
365
366 sc = dev->si_drv1;
367
368 err = 0;
369 d = (struct cpld_cmd_data *)data;
370 if (d->len + d->offset > CPLD_MAX_DRAM_WORDS) {
371 return (EINVAL);
372 }
373 xfer_data = malloc(d->len * sizeof(uint16_t), M_TEMP, M_WAITOK);
374
375 switch (cmd) {
376 case IOCCPLDSEND:
377 err = copyin(d->words, xfer_data, d->len * sizeof(uint16_t));
378 d->words = xfer_data;
379 if (err == 0)
380 err = cpld_send(sc->sc_dev, d);
381 break;
382 case IOCCPLDRECV:
383 tmp = d->words;
384 d->words = xfer_data;
385 err = cpld_recv(sc->sc_dev, d);
386 d->words = tmp;
387 if (err == 0)
388 err = copyout(xfer_data, d->words,
389 d->len * sizeof(uint16_t));
390 break;
391 default:
392 err = ENOTTY;
393 break;
394 }
395 free(xfer_data, M_TEMP);
396
397 return (err);
398 }
399