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Searched refs:COND_EQ (Results 1 – 16 of 16) sorted by relevance

/freebsd-14.2/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DARMDefines.h33 #define COND_EQ \ macro
73 case COND_EQ: in ARMCondCodeToString()
115 case COND_EQ: in ARMConditionPassed()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrInfo.h42 COND_EQ = 7, // Equal enumerator
75 return M68k::COND_EQ; in GetOppositeBranchCondition()
76 case M68k::COND_EQ: in GetOppositeBranchCondition()
101 case M68k::COND_EQ: in GetCondBranchFromCond()
137 return M68k::COND_EQ; in GetCondFromBranchOpc()
H A DM68kISelLowering.cpp1668 M68k::CondCode Cond = CC == ISD::SETEQ ? M68k::COND_NE : M68k::COND_EQ; in getBitTestCondition()
1727 return M68k::COND_EQ; in TranslateIntegerM68kCC()
1806 return M68k::COND_EQ; in TranslateM68kCC()
1954 if ((M68kCC == M68k::COND_EQ || M68kCC == M68k::COND_NE) && in EmitTest()
2086 case M68k::COND_EQ: in isM68kCCUnsigned()
2284 (CondCode == M68k::COND_EQ || CondCode == M68k::COND_NE)) { in LowerSELECT()
2313 if (isAllOnesConstant(Op1) != (CondCode == M68k::COND_EQ)) in LowerSELECT()
2598 M68k::CondCode MxCond = Inverted ? M68k::COND_EQ : M68k::COND_NE; in LowerBRCOND()
H A DM68kInstrInfo.cpp53 return M68k::COND_EQ; in getCondFromBranchOpc()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrInfo.cpp199 case AVRCC::COND_EQ: in getBrCond()
223 return AVRCC::COND_EQ; in getCondFromBranchOpc()
245 case AVRCC::COND_EQ: in getOppositeCondition()
248 return AVRCC::COND_EQ; in getOppositeCondition()
H A DAVRInstrInfo.h34 COND_EQ, //!< Equal enumerator
H A DAVRISelLowering.cpp637 return AVRCC::COND_EQ; in intCCToAVRCC()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRedundantCopyElimination.cpp80 if (CC == RISCVCC::COND_EQ && Cond[2].getReg() == RISCV::X0 && TBB == &MBB) in guaranteesZeroRegInBlock()
H A DRISCVISelDAGToDAG.h171 return RISCVCC::COND_EQ; in getRISCVCCForIntCC()
H A DRISCVInstrInfo.h36 COND_EQ, enumerator
H A DRISCVInstrInfo.cpp880 return RISCVCC::COND_EQ; in getCondFromBranchOpc()
913 case RISCVCC::COND_EQ: in getBrCond()
936 case RISCVCC::COND_EQ: in getOppositeBranchCondition()
939 return RISCVCC::COND_EQ; in getOppositeBranchCondition()
1180 if (CC == RISCVCC::COND_EQ || CC == RISCVCC::COND_NE) in optimizeCondBranch()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DVOPCInstructions.td661 defm V_CMP_EQ_U16 : VOPC_I16 <"v_cmp_eq_u16", COND_EQ>;
726 defm V_CMP_EQ_U32 : VOPC_I32 <"v_cmp_eq_u32", COND_EQ>;
744 defm V_CMP_EQ_U64 : VOPC_I64 <"v_cmp_eq_u64", COND_EQ>;
1009 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U32_e64, i32>;
1020 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U64_e64, i64>;
1032 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_t16_e64, i16>;
1045 defm : ICMP_Pattern <COND_EQ, V_CMP_EQ_U16_e64, i16>;
H A DAMDGPUInstructions.td397 def COND_EQ : PatFrags<(ops), [(OtherVT SETEQ), (OtherVT SETUEQ)]>;
H A DSOPInstructions.td1318 def S_CMP_EQ_U32 : SOPC_CMP_32 <"s_cmp_eq_u32", COND_EQ>;
1333 def S_CMP_EQ_U64 : SOPC_CMP_64 <"s_cmp_eq_u64", COND_EQ>;
H A DR600Instructions.td895 [(set i32:$dst, (selectcc i32:$src0, 0, i32:$src1, i32:$src2, COND_EQ))]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVInstructionSelector.cpp418 return RISCVCC::COND_EQ; in getRISCVCCFromICmp()