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Searched refs:CLK_SYSTEM_RATE (Results 1 – 4 of 4) sorted by relevance

/freebsd-14.2/sys/arm64/nvidia/tegra210/
H A Dtegra210_car.c246 GATE_INV(TEGRA210_CLK_HCLK, "hclk", "hclk_div", CLK_SYSTEM_RATE, 7),
247 GATE_INV(TEGRA210_CLK_PCLK, "pclk", "pclk_div", CLK_SYSTEM_RATE, 3),
257 DIV(0, "hclk_div", "sclk", CLK_SYSTEM_RATE, 4, 2, 0),
258 DIV(0, "pclk_div", "hclk", CLK_SYSTEM_RATE, 0, 2, 0),
H A Dtegra210_car.h49 #define CLK_SYSTEM_RATE 0x030 macro
/freebsd-14.2/sys/arm/nvidia/tegra124/
H A Dtegra124_car.c259 GATE_INV(TEGRA124_CLK_HCLK, "hclk", "hclk_div", CLK_SYSTEM_RATE, 7),
260 GATE_INV(TEGRA124_CLK_PCLK, "pclk", "pclk_div", CLK_SYSTEM_RATE, 3),
276 DIV(0, "hclk_div", "sclk", CLK_SYSTEM_RATE, 4, 2, 0),
277 DIV(0, "pclk_div", "hclk", CLK_SYSTEM_RATE, 0, 2, 0),
H A Dtegra124_car.h48 #define CLK_SYSTEM_RATE 0x030 macro