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Searched refs:CCVT (Results 1 – 10 of 10) sorted by relevance

/freebsd-14.2/contrib/llvm-project/clang/lib/AST/
H A DComparisonCategories.cpp186 using CCVT = ComparisonCategoryResult; in getResultString() typedef
188 case CCVT::Equal: in getResultString()
190 case CCVT::Equivalent: in getResultString()
192 case CCVT::Less: in getResultString()
194 case CCVT::Greater: in getResultString()
196 case CCVT::Unordered: in getResultString()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp4740 EVT CCVT = getSetCCResultType(VT); in visitSDIV() local
4818 EVT CCVT = getSetCCResultType(VT); in visitSDIVLike() local
4856 SDValue IsOne = DAG.getSetCC(DL, CCVT, N1, One, ISD::SETEQ); in visitSDIVLike()
4867 SDValue IsNeg = DAG.getSetCC(DL, CCVT, N1, Zero, ISD::SETLT); in visitSDIVLike()
4888 EVT CCVT = getSetCCResultType(VT); in visitUDIV() local
4902 if (N1C && N1C->isAllOnes() && CCVT.isVector() == VT.isVector()) { in visitUDIV()
4998 EVT CCVT = getSetCCResultType(VT); in visitREM() local
5010 CCVT.isVector() == VT.isVector()) { in visitREM()
5012 SDValue EqualsNeg1 = DAG.getSetCC(DL, CCVT, F0, N1, ISD::SETEQ); in visitREM()
6819 EVT CCVT = in combineShiftAnd1ToBitTest() local
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H A DTargetLowering.cpp6128 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in buildSDIVPow2WithCMov() local
6129 SDValue Cmp = DAG.getSetCC(DL, CCVT, N0, Zero, ISD::SETLT); in buildSDIVPow2WithCMov()
7070 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in getSqrtInputTest() local
7078 return DAG.getSetCC(DL, CCVT, Op, FPZero, ISD::SETEQ); in getSqrtInputTest()
7088 return DAG.getSetCC(DL, CCVT, Fabs, NormC, ISD::SETLT); in getSqrtInputTest()
9023 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in expandABD() local
9025 SDValue Cmp = DAG.getSetCC(dl, CCVT, LHS, RHS, CC); in expandABD()
H A DSelectionDAGBuilder.cpp7558 EVT CCVT = TLI.getValueType(DAG.getDataLayout(), I.getType()); in visitIntrinsicCall() local
7562 if (!TLI.shouldExpandGetActiveLaneMask(CCVT, ElementVT)) { in visitIntrinsicCall()
7569 CCVT.getVectorElementCount()); in visitIntrinsicCall()
7576 SDValue SetCC = DAG.getSetCC(sdl, CCVT, VectorInduction, in visitIntrinsicCall()
H A DLegalizeDAG.cpp4105 EVT CCVT = getSetCCResultType(CmpVT); in ExpandNode() local
4106 SDValue Cond = DAG.getNode(ISD::SETCC, dl, CCVT, Tmp1, Tmp2, CC, Node->getFlags()); in ExpandNode()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp2230 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in LowerUDIVREM() local
2232 SDValue Cond = DAG.getSetCC(DL, CCVT, R, Y, ISD::SETUGE); in LowerUDIVREM()
2239 Cond = DAG.getSetCC(DL, CCVT, R, Y, ISD::SETUGE); in LowerUDIVREM()
H A DSIISelLowering.cpp5804 EVT CCVT = EVT::getIntegerVT(*DAG.getContext(), WavefrontSize); in lowerICMPIntrinsic() local
5806 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, DL, CCVT, LHS, RHS, in lowerICMPIntrinsic()
5808 if (VT.bitsEq(CCVT)) in lowerICMPIntrinsic()
5834 EVT CCVT = EVT::getIntegerVT(*DAG.getContext(), WavefrontSize); in lowerFCMPIntrinsic() local
5835 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, SL, CCVT, Src0, in lowerFCMPIntrinsic()
5837 if (VT.bitsEq(CCVT)) in lowerFCMPIntrinsic()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp10324 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in getSqrtInputTest() local
10326 return DAG.getSetCC(DL, CCVT, Op, FPZero, ISD::SETEQ); in getSqrtInputTest()
22773 EVT CCVT = N0.getValueType(); in performVSelectCombine() local
22815 CCVT.getVectorElementCount() != ElementCount::getFixed(1) || in performVSelectCombine()
22816 CCVT.getVectorElementType() != MVT::i1 || in performVSelectCombine()
22874 EVT CCVT = SrcVT.changeVectorElementTypeToInteger(); in performSelectCombine() local
22879 if (CCVT.getSizeInBits() != ResVT.getSizeInBits()) in performSelectCombine()
22893 SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2)); in performSelectCombine()
22896 SmallVector<int, 8> DUPMask(CCVT.getVectorNumElements(), 0); in performSelectCombine()
22897 SDValue Mask = DAG.getVectorShuffle(CCVT, DL, SetCC, SetCC, DUPMask); in performSelectCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp6488 EVT CCVT = in LowerOperation() local
6492 DAG.getNode(ISD::SETCC, DL, CCVT, Tmp1, Tmp2, CC, Op->getFlags()); in LowerOperation()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp44411 EVT CCVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, NumElts); in combineToExtendBoolVectorInReg() local
44412 Vec = DAG.getSetCC(DL, CCVT, Vec, BitMask, ISD::SETEQ); in combineToExtendBoolVectorInReg()