| /freebsd-14.2/sys/contrib/device-tree/Bindings/arm/ |
| H A D | cci.txt | 2 ARM CCI cache coherent interconnect binding description 14 * CCI interconnect node 22 Every CCI node has to define the following properties: 37 address of CCI control registers common to all 53 - CCI control interface nodes 56 Parent node must be CCI interconnect node. 83 - CCI PMU node 85 Parent node must be CCI interconnect node. 96 secure access to CCI registers 124 * CCI interconnect bus masters [all …]
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| H A D | arm,cci-400.yaml | 7 title: ARM CCI Cache Coherent Interconnect 14 coherent interconnect (CCI) that is capable of monitoring bus transactions 35 Specifies base physical address of CCI control registers common to all 76 Permitted only where OS has secure access to CCI registers 89 The CCI PMU has an interrupt signal for each counter. The number of 128 * This CCI node corresponds to a CCI component whose control 131 * CCI slave interface @0x000000002c091000 is connected to dma 134 * CCI slave interface @0x000000002c094000 is connected to CPUs 137 * CCI slave interface @0x000000002c095000 is connected to CPUs
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| H A D | cci-control-port.yaml | 7 title: CCI Interconnect Bus Masters 13 Masters in the device tree connected to a CCI port (inclusive of CPUs
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | i2c-qcom-cci.txt | 1 Qualcomm Camera Control Interface (CCI) I2C controller 18 Definition: base address CCI I2C controller and length of memory 24 Definition: specifies the CCI I2C interrupt. The format of the 46 The CCI provides I2C masters for one (msm8916) or two i2c busses (msm8996, 55 Definition: Index of the CCI bus/master
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| H A D | qcom,i2c-cci.yaml | 7 title: Qualcomm Camera Control Interface (CCI) I2C controller 24 - const: qcom,msm8226-cci # CCI v1 32 - const: qcom,msm8996-cci # CCI v2
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/interconnect/ |
| H A D | mediatek,cci.yaml | 7 title: MediaTek Cache Coherent Interconnect (CCI) frequency and voltage scaling 14 MediaTek Cache Coherent Interconnect (CCI) is a hardware engine used by 44 Phandle of the regulator for CCI that provides the supply voltage. 48 Phandle of the regulator for sram of CCI that provides the supply
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/usb/ |
| H A D | dwc3-xilinx.txt | 23 - dma-coherent: Enable this flag if CCI is enabled in design. Adding this 25 Xilinx USB 3.0 IP - USB coherency register to enable CCI.
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| /freebsd-14.2/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/ |
| H A D | CheckerManager.cpp | 80 CachedDeclCheckersMapTy::iterator CCI = CachedDeclCheckersMap.find(DeclKind); in runCheckersOnASTDecl() local 81 if (CCI != CachedDeclCheckersMap.end()) { in runCheckersOnASTDecl() 82 checkers = &(CCI->second); in runCheckersOnASTDecl() 910 CachedStmtCheckersMapTy::iterator CCI = CachedStmtCheckersMap.find(Key); in getCachedStmtCheckersFor() local 911 if (CCI != CachedStmtCheckersMap.end()) in getCachedStmtCheckersFor() 912 return CCI->second; in getCachedStmtCheckersFor()
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/media/i2c/ |
| H A D | ov5647.txt | 5 and CCI (I2C compatible) control bus.
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| H A D | ovti,ov5647.yaml | 15 interfaces and CCI (I2C compatible) control bus.
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| H A D | samsung,s5k6a3.yaml | 14 interfaces and CCI (I2C compatible) control bus.
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| H A D | ov5647.yaml | 15 interfaces and CCI (I2C compatible) control bus.
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| H A D | hynix,hi846.yaml | 14 interface and CCI (I2C compatible) control bus. The output format
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| /freebsd-14.2/contrib/llvm-project/clang/lib/AST/ |
| H A D | ASTTypeTraits.cpp | 236 if (const CXXCtorInitializer *CCI = get<CXXCtorInitializer>()) in getSourceRange() local 237 return CCI->getSourceRange(); in getSourceRange()
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | mediatek,cirq.txt | 4 work outside MCUSYS which comprises with Cortex-Ax cores,CCI and GIC.
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| H A D | mediatek,mtk-cirq.yaml | 14 work outside of MCUSYS which comprises with Cortex-Ax cores, CCI and GIC.
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/media/ |
| H A D | samsung-s5k6a3.txt | 5 and CCI (I2C compatible) control bus.
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVEmitIntrinsics.cpp | 207 auto *CCI = in preprocessCompositeConstants() local 209 Worklist.push(CCI); in preprocessCompositeConstants() 210 I->replaceUsesOfWith(Op, CCI); in preprocessCompositeConstants() 212 AggrConsts[CCI] = AggrC; in preprocessCompositeConstants()
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/soc/mediatek/ |
| H A D | mtk-svs.yaml | 17 different power domains(CPU/GPU/CCI) according to
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| /freebsd-14.2/sys/contrib/device-tree/Bindings/clock/ |
| H A D | samsung,exynos7885-clock.yaml | 82 - description: CCI clock (from CMU_TOP)
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| H A D | samsung,exynos850-clock.yaml | 143 - description: CCI clock (from CMU_TOP)
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| /freebsd-14.2/share/doc/smm/01.setup/ |
| H A D | spell.ok | 14 CCI
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| /freebsd-14.2/sys/contrib/device-tree/src/arm/ |
| H A D | exynos5420-galaxy-tab-common.dtsi | 93 /* CCI is disabled in hardware */
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 982 MCInst::iterator CCI = MI.begin(); in AddThumbPredicate() local 983 for (unsigned i = 0; i < MCID.NumOperands; ++i, ++CCI) { in AddThumbPredicate() 984 if (MCID.operands()[i].isPredicate() || CCI == MI.end()) in AddThumbPredicate() 989 CCI = MI.insert(CCI, MCOperand::createImm(CC)); in AddThumbPredicate() 990 ++CCI; in AddThumbPredicate() 992 MI.insert(CCI, MCOperand::createReg(0)); in AddThumbPredicate() 994 MI.insert(CCI, MCOperand::createReg(ARM::CPSR)); in AddThumbPredicate()
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| /freebsd-14.2/contrib/llvm-project/clang/lib/Sema/ |
| H A D | SemaOpenMP.cpp | 4046 auto CCI = CurComponents.rbegin(); in VisitMemberExpr() local 4050 if (CCI->getAssociatedExpression()->getStmtClass() != in VisitMemberExpr() 4057 CCI->getAssociatedExpression()))) in VisitMemberExpr() 4060 const Decl *CCD = CCI->getAssociatedDeclaration(); in VisitMemberExpr() 4066 std::advance(CCI, 1); in VisitMemberExpr() 4067 if (CCI == CCE) in VisitMemberExpr()
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