Searched refs:BoolRC (Results 1 – 4 of 4) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 84 const TargetRegisterClass *BoolRC = nullptr; member in __anona574a0c70111::SILowerControlFlow
235 : MRI->createVirtualRegister(BoolRC); in emitIf()
242 Register Tmp = MRI->createVirtualRegister(BoolRC); in emitIf()
318 Register SaveReg = MRI->createVirtualRegister(BoolRC); in emitElse()
392 AndReg = MRI->createVirtualRegister(BoolRC); in emitIfBreak()
860 BoolRC = TRI->getBoolRC(); in runOnMachineFunction()
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| H A D | SIWholeQuadMode.cpp | 1318 const TargetRegisterClass *BoolRC = TRI->getBoolRC(); in processBlock() local
1439 SavedNonStrictReg = MRI->createVirtualRegister(BoolRC); in processBlock()
1448 SavedWQMReg = MRI->createVirtualRegister(BoolRC); in processBlock()
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| H A D | SIInstrInfo.td | 928 class BoolRC : RegisterOperand<SReg_1> {
938 def VOPDstS64orS32 : BoolRC {
989 def SDWAVopcDst : BoolRC {
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| H A D | SIISelLowering.cpp | 4228 const TargetRegisterClass *BoolRC = TRI->getBoolRC(); in emitLoadM0FromVGPRLoop() local
4229 Register PhiExec = MRI.createVirtualRegister(BoolRC); in emitLoadM0FromVGPRLoop()
4230 Register NewExec = MRI.createVirtualRegister(BoolRC); in emitLoadM0FromVGPRLoop()
4232 Register CondReg = MRI.createVirtualRegister(BoolRC); in emitLoadM0FromVGPRLoop()
4764 const TargetRegisterClass *BoolRC = TRI->getBoolRC(); in EmitInstrWithCustomInserter() local
4770 MI, MRI, Src0, BoolRC, AMDGPU::sub0, &AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter()
4772 MI, MRI, Src0, BoolRC, AMDGPU::sub1, &AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter()
4775 MI, MRI, Src1, BoolRC, AMDGPU::sub0, &AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter()
4777 MI, MRI, Src1, BoolRC, AMDGPU::sub1, &AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter()
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