| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86LowerAMXType.cpp | 240 Use &U = *(Bitcast->use_begin()); in combineLoadBitcast()
244 IRBuilder<> Builder(Bitcast); in combineLoadBitcast()
278 if (Bitcast->hasOneUse()) in combineBitcastStore()
290 Bitcast->replaceAllUsesWith(Vec); in combineBitcastStore()
295 IRBuilder<> Builder(Bitcast); in transformBitcast()
298 auto *Src = Bitcast->getOperand(0); in transformBitcast()
315 Use &U = *(Bitcast->use_begin()); in transformBitcast()
340 Prepare(Bitcast->getType()); in transformBitcast()
360 if (!Bitcast) in visit()
365 if (Bitcast->user_empty()) { in visit()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 164 Bitcast, enumerator
348 bool isBitcast() const { return Flags & (1ULL << MCID::Bitcast); } in isBitcast()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUPreLegalizerCombiner.cpp | 203 auto Bitcast = B.buildBitcast({S32}, CvtPk); in applyClampI64ToI16() local
207 {MinBoundaryDst.getReg(0), Bitcast.getReg(0), MaxBoundaryDst.getReg(0)}, in applyClampI64ToI16()
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| H A D | AMDGPURegisterBankInfo.cpp | 1724 auto Bitcast = B.buildBitcast(S32, Src); in unpackV2S16ToS32() local
1727 auto ExtLo = B.buildSExtInReg(S32, Bitcast, 16); in unpackV2S16ToS32()
1728 auto ShiftHi = B.buildAShr(S32, Bitcast, B.buildConstant(S32, 16)); in unpackV2S16ToS32()
1732 auto ShiftHi = B.buildLShr(S32, Bitcast, B.buildConstant(S32, 16)); in unpackV2S16ToS32()
1734 auto ExtLo = B.buildAnd(S32, Bitcast, B.buildConstant(S32, 0xffff)); in unpackV2S16ToS32()
1739 return std::pair(Bitcast.getReg(0), ShiftHi.getReg(0)); in unpackV2S16ToS32()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerInfo.cpp | 54 case Bitcast: in operator <<()
177 case Bitcast: { in mutationIsSane()
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| H A D | LegacyLegalizerInfo.cpp | 45 case Bitcast: in operator <<()
260 case Bitcast: in findAction()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 446 auto Bitcast = in legalizeCustom() local
453 MIRBuilder.buildFSub(Dst, Bitcast, TwoP52FP); in legalizeCustom()
455 MachineInstrBuilder ResF64 = MIRBuilder.buildFSub(s64, Bitcast, TwoP52FP); in legalizeCustom()
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| H A D | MipsISelLowering.cpp | 5005 Register Bitcast = MRI.createVirtualRegister(&Mips::MSA128WRegClass); in emitSTR_D() local
5008 BuildMI(*BB, I, DL, TII->get(Mips::COPY)).addDef(Bitcast).addUse(StoreVal); in emitSTR_D()
5011 .addUse(Bitcast) in emitSTR_D()
5015 .addUse(Bitcast) in emitSTR_D()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizerInfo.h | 74 Bitcast, enumerator
173 case LegacyLegalizeActions::Bitcast: in LegalizeActionStep()
174 Action = LegalizeActions::Bitcast; in LegalizeActionStep()
661 return actionIf(LegalizeAction::Bitcast, Predicate, Mutation); in bitcastIf()
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| H A D | LegacyLegalizerInfo.h | 55 Bitcast, enumerator
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | CodeExtractor.cpp | 549 Instruction *Bitcast = cast<Instruction>(U); in findAllocas() local
550 for (User *BU : Bitcast->users()) { in findAllocas()
562 << *Bitcast << " in out-of-region lifetime marker " in findAllocas()
582 Instruction *Bitcast = cast<Instruction>(U); in findAllocas() local
583 LifetimeMarkerInfo LMI = getLifetimeMarkers(CEAC, Bitcast, ExitBlock); in findAllocas()
585 Bitcasts.push_back(Bitcast); in findAllocas()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/IPO/ |
| H A D | FunctionSpecialization.cpp | 484 if (auto *Bitcast = dyn_cast<BitCastInst>(User)) { in getPromotableAlloca() local
485 if (!Bitcast->hasOneUse() || *Bitcast->user_begin() != Call) in getPromotableAlloca()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2468 SDValue Bitcast = N->getOperand(0); in performVECTOR_SHUFFLECombine() local
2469 if (Bitcast.getOpcode() != ISD::BITCAST) in performVECTOR_SHUFFLECombine()
2473 SDValue CastOp = Bitcast.getOperand(0); in performVECTOR_SHUFFLECombine()
2475 EVT DstType = Bitcast.getValueType(); in performVECTOR_SHUFFLECombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCompares.cpp | 3166 auto *Bitcast = dyn_cast<BitCastInst>(Cmp.getOperand(0)); in foldICmpBitCast() local
3167 if (!Bitcast) in foldICmpBitCast()
3172 Value *BCSrcOp = Bitcast->getOperand(0); in foldICmpBitCast()
3173 Type *SrcType = Bitcast->getSrcTy(); in foldICmpBitCast()
3174 Type *DstType = Bitcast->getType(); in foldICmpBitCast()
3215 if (match(Op1, m_APInt(C)) && Bitcast->hasOneUse() && in foldICmpBitCast()
3252 if (Cmp.isEquality() && C->isAllOnes() && Bitcast->hasOneUse()) { in foldICmpBitCast()
3264 if (Cmp.isEquality() && C->isZero() && Bitcast->hasOneUse() && in foldICmpBitCast()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 1667 auto Bitcast = MIRBuilder.buildBitcast(NewTy, ValReg); in legalizeLoadStore() local
1668 MIRBuilder.buildStore(Bitcast.getReg(0), MI.getOperand(1), MMO); in legalizeLoadStore()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 1002 return hasProperty(MCID::Bitcast, Type);
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| /freebsd-14.2/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | BuiltinsNVPTX.def | 577 // Bitcast
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrP10.td | 2390 (VINSDRX $vDi, InsertEltShift.Left3, Bitcast.DblToLong)>;
2437 (VINSDLX $vDi, InsertEltShift.Left3, Bitcast.DblToLong)>;
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| H A D | PPCISelLowering.cpp | 15793 SDNode *Bitcast = *Trunc->use_begin(); in PerformDAGCombine() local
15796 if (Bitcast->getOpcode() != ISD::BITCAST || in PerformDAGCombine()
15797 Bitcast->getValueType(0) != MVT::f32) in PerformDAGCombine()
15804 std::swap(Bitcast, Bitcast2); in PerformDAGCombine()
15838 DCI.CombineTo(Bitcast, FloatLoad2); in PerformDAGCombine()
17812 SDValue Bitcast = DCI.DAG.getBitcast(MVT::v2i64, Op0.getOperand(0)); in combineTRUNCATE() local
17814 ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64, Bitcast, in combineTRUNCATE()
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| H A D | PPCInstrVSX.td | 1815 def Bitcast {
3579 def : Pat<(i32 (bitconvert f32:$A)), Bitcast.FltToInt>;
3589 def : Pat<(i64 (bitconvert f64:$A)), Bitcast.DblToLong>;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2560 SDValue Bitcast = DAG.getNode(ISD::BITCAST, SL, MVT::i32, A); in LowerFROUND32() local
2562 SDValue Sign = DAG.getNode(ISD::AND, SL, MVT::i32, Bitcast, in LowerFROUND32()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrVFP.td | 1180 // Bitcast i32 -> f32. NEON prefers to use VMOVDRR.
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| H A D | ARMISelLowering.cpp | 18008 SDValue Bitcast = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, VQMOVN); in PerformMinMaxCombine() local
18009 return DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Bitcast, in PerformMinMaxCombine()
18049 SDValue Bitcast = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, VQMOVN); in PerformMinMaxCombine() local
18050 return DAG.getNode(ISD::AND, DL, VT, Bitcast, in PerformMinMaxCombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5184 SDValue Bitcast = DAG.getBitcast(IntVT, FloatVal); in lowerCTLZ_CTTZ_ZERO_UNDEF() local
5190 Exp = DAG.getNode(ISD::VP_LSHR, DL, IntVT, Bitcast, in lowerCTLZ_CTTZ_ZERO_UNDEF()
5194 Exp = DAG.getNode(ISD::SRL, DL, IntVT, Bitcast, in lowerCTLZ_CTTZ_ZERO_UNDEF()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsNVVM.td | 1294 // Bitcast
|