Searched refs:BasePtrReg (Results 1 – 3 of 3) sorted by relevance
1085 Register BasePtrReg = in emitPrologue() local1190 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), BasePtrReg) in emitPrologue()1213 bool BPSaved = FuncInfo->hasPrologEpilogSGPRSpillEntry(BasePtrReg); in emitPrologue()1545 Register BasePtrReg = TRI->getBaseRegister(); in determinePrologEpilogSGPRSaves() local1546 assert(!MFI->hasPrologEpilogSGPRSpillEntry(BasePtrReg) && in determinePrologEpilogSGPRSaves()1548 getVGPRSpillLaneOrTempRegister(MF, LiveUnits, BasePtrReg); in determinePrologEpilogSGPRSaves()1694 Register BasePtrReg = RI->getBaseRegister(); in assignCalleeSavedSpillSlots() local1698 FuncInfo->getScratchSGPRCopyDstReg(BasePtrReg); in assignCalleeSavedSpillSlots()1714 } else if (CS.getReg() == BasePtrReg && SGPRForBPSaveRestoreCopy) { in assignCalleeSavedSpillSlots()
658 MCRegister BasePtrReg = getBaseRegister(); in getReservedRegs() local659 reserveRegisterTuples(Reserved, BasePtrReg); in getReservedRegs()660 assert(!isSubRegister(ScratchRSrcReg, BasePtrReg)); in getReservedRegs()
1149 Register BasePtrReg = SrcRegs[0]; in applyMappingLoad() local1151 MRI.setType(BasePtrReg, PtrTy); in applyMappingLoad()