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Searched refs:BaseOps1 (Results 1 – 9 of 9) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.h160 bool shouldClusterMemOps(ArrayRef<const MachineOperand *> BaseOps1,
H A DRISCVInstrInfo.cpp2244 ArrayRef<const MachineOperand *> BaseOps1, in memOpsHaveSameBasePtr() argument
2250 if (BaseOps1.front()->isIdenticalTo(*BaseOps2.front())) in memOpsHaveSameBasePtr()
2275 ArrayRef<const MachineOperand *> BaseOps1, int64_t Offset1, in shouldClusterMemOps() argument
2281 if (!BaseOps1.empty() && !BaseOps2.empty()) { in shouldClusterMemOps()
2282 const MachineInstr &FirstLdSt = *BaseOps1.front()->getParent(); in shouldClusterMemOps()
2284 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseOps1, SecondLdSt, BaseOps2)) in shouldClusterMemOps()
2286 } else if (!BaseOps1.empty() || !BaseOps2.empty()) { in shouldClusterMemOps()
2292 BaseOps1.front()->getParent()->getMF()->getSubtarget().getCacheLineSize(); in shouldClusterMemOps()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.h181 bool shouldClusterMemOps(ArrayRef<const MachineOperand *> BaseOps1,
H A DAArch64InstrInfo.cpp4253 ArrayRef<const MachineOperand *> BaseOps1, int64_t OpOffset1, in shouldClusterMemOps() argument
4257 assert(BaseOps1.size() == 1 && BaseOps2.size() == 1); in shouldClusterMemOps()
4258 const MachineOperand &BaseOp1 = *BaseOps1.front(); in shouldClusterMemOps()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h561 bool shouldClusterMemOps(ArrayRef<const MachineOperand *> BaseOps1,
H A DPPCInstrInfo.cpp2873 ArrayRef<const MachineOperand *> BaseOps1, int64_t OpOffset1, in shouldClusterMemOps() argument
2878 assert(BaseOps1.size() == 1 && BaseOps2.size() == 1); in shouldClusterMemOps()
2879 const MachineOperand &BaseOp1 = *BaseOps1.front(); in shouldClusterMemOps()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp526 if (BaseOps1.front()->isIdenticalTo(*BaseOps2.front())) in memOpsHaveSameBasePtr()
558 if (!BaseOps1.empty() && !BaseOps2.empty()) { in shouldClusterMemOps()
559 const MachineInstr &FirstLdSt = *BaseOps1.front()->getParent(); in shouldClusterMemOps()
561 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseOps1, SecondLdSt, BaseOps2)) in shouldClusterMemOps()
563 } else if (!BaseOps1.empty() || !BaseOps2.empty()) { in shouldClusterMemOps()
3627 memOpsHaveSameBaseOperands(ArrayRef<const MachineOperand *> BaseOps1, in memOpsHaveSameBaseOperands() argument
3629 if (BaseOps1.size() != BaseOps2.size()) in memOpsHaveSameBaseOperands()
3631 for (size_t I = 0, E = BaseOps1.size(); I < E; ++I) { in memOpsHaveSameBaseOperands()
3632 if (!BaseOps1[I]->isIdenticalTo(*BaseOps2[I])) in memOpsHaveSameBaseOperands()
3648 SmallVector<const MachineOperand *, 4> BaseOps0, BaseOps1; in checkInstOffsetsDoNotOverlap() local
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H A DSIInstrInfo.h246 bool shouldClusterMemOps(ArrayRef<const MachineOperand *> BaseOps1,
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1525 virtual bool shouldClusterMemOps(ArrayRef<const MachineOperand *> BaseOps1, in shouldClusterMemOps() argument