| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.h | 64 BRCOND, enumerator
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| H A D | AVRISelLowering.cpp | 107 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in AVRTargetLowering()
265 NODE(BRCOND); in getTargetNodeName()
895 return DAG.getNode(AVRISD::BRCOND, dl, MVT::Other, Chain, Dest, TargetCC, in LowerBR_CC()
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| H A D | AVRInstrInfo.td | 51 : SDNode<"AVRISD::BRCOND", SDT_AVRBrcond, [SDNPHasChain, SDNPInGlue]>;
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1068 BRCOND, enumerator
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.h | 69 BRCOND, enumerator
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| H A D | M68kISelLowering.cpp | 123 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in M68kTargetLowering()
1394 case ISD::BRCOND: in LowerOperation()
1859 if (User->getOpcode() != ISD::BRCOND && User->getOpcode() != ISD::SETCC && in hasNonFlagsUse()
2528 Chain = DAG.getNode(M68kISD::BRCOND, DL, Op.getValueType(), Chain, in LowerBRCOND()
2558 Chain = DAG.getNode(M68kISD::BRCOND, DL, Op.getValueType(), Chain, in LowerBRCOND()
2602 return DAG.getNode(M68kISD::BRCOND, DL, Op.getValueType(), Chain, Dest, CC, in LowerBRCOND()
3596 return DAG.getNode(M68kISD::BRCOND, DL, N->getVTList(), N->getOperand(0), in combineM68kBrCond()
3637 case M68kISD::BRCOND: in PerformDAGCombine()
3683 case M68kISD::BRCOND: in getTargetNodeName()
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| H A D | M68kInstrInfo.td | 134 def MxBrCond : SDNode<"M68kISD::BRCOND", MxSDT_BrCond, [SDNPHasChain]>;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 74 BRCOND, // Conditional branch. enumerator
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| H A D | ARMISelLowering.cpp | 827 setTargetDAGCombine({ISD::BRCOND, ISD::BR_CC}); in ARMTargetLowering()
1448 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in ARMTargetLowering()
1703 MAKE_CASE(ARMISD::BRCOND) in getTargetNodeName()
5674 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in OptimizeVFPBrcond()
5786 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in LowerBR_CC()
5805 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
5809 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
10561 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
18219 if (N->getOpcode() == ISD::BRCOND) { in PerformHWLoopCombine()
18874 case ISD::BRCOND: in PerformDAGCombine()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 396 case ISD::BRCOND: return "brcond"; in getOperationName()
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| H A D | SelectionDAGBuilder.cpp | 2772 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSwitchCase()
2837 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitJumpTableHeader()
2962 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSPDescriptorParent()
3056 Root = DAG.getNode(ISD::BRCOND, dl, MVT::Other, Root, RangeCmp, in visitBitTestHeader()
3114 SDValue BrAnd = DAG.getNode(ISD::BRCOND, dl, in visitBitTestCase()
11457 DAG.getNode(ISD::BRCOND, DL, MVT::Other, getControlRoot(), Cond, in lowerWorkItem()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 147 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in ARCTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 70 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in BPFTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 81 BRCOND, // Conditional branch instruction; "b.cond". enumerator
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| H A D | AArch64ISelLowering.cpp | 453 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in AArch64TargetLowering()
2364 MAKE_CASE(AArch64ISD::BRCOND) in getTargetNodeName()
6033 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
6128 case ISD::BRCOND: in LowerOperation()
8926 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBR_CC()
8993 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBR_CC()
9007 DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CC1Val, Cmp); in LowerBR_CC()
9010 return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, BR1, Dest, CC2Val, in LowerBR_CC()
23926 case AArch64ISD::BRCOND: in PerformDAGCombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 123 BRCOND, enumerator
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| H A D | X86InstrFragments.td | 142 def X86brcond : SDNode<"X86ISD::BRCOND", SDTX86BrCond,
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| H A D | X86ISelLowering.cpp | 337 setOperationAction(ISD::BRCOND , MVT::Other, Custom); in X86TargetLowering()
24619 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
24652 Chain = DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, in LowerBRCOND()
24686 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
24706 return DAG.getNode(X86ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, in LowerBRCOND()
31928 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
33160 NODE_NAME_CASE(BRCOND) in getTargetNodeName()
47742 case ISD::BRCOND: in combineCompareEqual()
53755 case X86ISD::BRCOND: in needCarryOrOverflowFlag()
53788 case X86ISD::BRCOND: in onlyZeroFlagUsed()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 100 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in R600TargetLowering()
420 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
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| H A D | SIISelLowering.cpp | 298 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in SITargetLowering()
5525 case ISD::BRCOND: return LowerBRCOND(Op, DAG); in LowerOperation()
6133 SDValue SITargetLowering::LowerBRCOND(SDValue BRCOND, in LowerBRCOND() argument
6135 SDLoc DL(BRCOND); in LowerBRCOND()
6137 SDNode *Intr = BRCOND.getOperand(1).getNode(); in LowerBRCOND()
6138 SDValue Target = BRCOND.getOperand(2); in LowerBRCOND()
6149 BR = findUser(BRCOND, ISD::BR); in LowerBRCOND()
6157 return BRCOND; in LowerBRCOND()
6171 Ops.push_back(BRCOND.getOperand(0)); in LowerBRCOND()
6184 BRCOND.getOperand(0) in LowerBRCOND()
[all …]
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| H A D | AMDGPUISelDAGToDAG.cpp | 660 case ISD::BRCOND: in Select()
2321 assert(N->getOpcode() == ISD::BRCOND); in isCBranchSCC()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 87 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in LanaiTargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 91 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in MSP430TargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 352 setOperationAction(ISD::BRCOND, MVT::Other, Custom); in MipsTargetLowering()
1226 case ISD::BRCOND: return lowerBRCOND(Op, DAG); in LowerOperation()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 154 setOperationAction(ISD::BRCOND, MVT::Other, Expand); in initSPUActions()
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