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Searched refs:ArgRC (Results 1 – 5 of 5) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp802 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
809 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
818 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
823 LI->loadInputValue(InputReg, MIRBuilder, IncomingArg, ArgRC, ArgTy); in passSpecialInputs()
853 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
856 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
859 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
862 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
H A DAMDGPULegalizerInfo.h114 const TargetRegisterClass *ArgRC, LLT ArgTy) const;
H A DAMDGPULegalizerInfo.cpp4146 const TargetRegisterClass *ArgRC, in loadInputValue() argument
4153 *ArgRC, B.getDebugLoc(), ArgTy); in loadInputValue()
4182 const TargetRegisterClass *ArgRC; in loadInputValue() local
4200 ArgRC = &AMDGPU::SReg_32RegClass; in loadInputValue()
4205 ArgRC = &AMDGPU::SReg_32RegClass; in loadInputValue()
4210 ArgRC = &AMDGPU::SReg_32RegClass; in loadInputValue()
4219 std::tie(Arg, ArgRC, ArgTy) = MFI->getPreloadedValue(ArgType); in loadInputValue()
4237 return loadInputValue(DstReg, B, Arg, ArgRC, ArgTy); in loadInputValue()
4266 const TargetRegisterClass *ArgRC; in legalizeWorkitemIDIntrinsic() local
4268 std::tie(Arg, ArgRC, ArgTy) = MFI->getPreloadedValue(ArgType); in legalizeWorkitemIDIntrinsic()
H A DSIISelLowering.cpp3274 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
3283 std::tie(OutgoingArg, ArgRC, ArgTy) = in passSpecialInputs()
3293 assert(IncomingArgRC == ArgRC); in passSpecialInputs()
3296 EVT ArgVT = TRI->getSpillSize(*ArgRC) == 8 ? MVT::i64 : MVT::i32; in passSpecialInputs()
3300 InputReg = loadInputValue(DAG, ArgRC, ArgVT, DL, *IncomingArg); in passSpecialInputs()
3335 const TargetRegisterClass *ArgRC; in passSpecialInputs() local
3338 std::tie(OutgoingArg, ArgRC, Ty) = in passSpecialInputs()
3341 std::tie(OutgoingArg, ArgRC, Ty) = in passSpecialInputs()
3344 std::tie(OutgoingArg, ArgRC, Ty) = in passSpecialInputs()
3375 SDValue Y = loadInputValue(DAG, ArgRC, MVT::i32, DL, *IncomingArgY); in passSpecialInputs()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp19114 const TargetRegisterClass *ArgRC = in canMergeExpensiveCrossRegisterBankCopy() local
19117 if (ArgRC == ResRC || !TLI.isOperationLegal(ISD::LOAD, ResVT)) in canMergeExpensiveCrossRegisterBankCopy()
19125 if (!TRI || TRI->getCommonSubClass(ArgRC, ResRC)) in canMergeExpensiveCrossRegisterBankCopy()