Searched refs:ArgGPRs (Results 1 – 4 of 4) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYCallingConv.h | 29 static const MCPhysReg ArgGPRs[] = {CSKY::R0, CSKY::R1, CSKY::R2, CSKY::R3}; in CC_CSKY_ABIV2_SOFT_64() local 30 Register Reg = State.AllocateReg(ArgGPRs); in CC_CSKY_ABIV2_SOFT_64() 38 if (!State.AllocateReg(ArgGPRs)) in CC_CSKY_ABIV2_SOFT_64() 48 static const MCPhysReg ArgGPRs[] = {CSKY::R0, CSKY::R1}; in Ret_CSKY_ABIV2_SOFT_64() local 49 Register Reg = State.AllocateReg(ArgGPRs); in Ret_CSKY_ABIV2_SOFT_64() 54 if (!State.AllocateReg(ArgGPRs)) in Ret_CSKY_ABIV2_SOFT_64()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 1517 ArrayRef<MCPhysReg> ArgGPRs = get64BitArgumentGPRs(CallConv, Subtarget); in createVarArgAreaAndStoreRegisters() local 1520 unsigned NumIntRegs = CCInfo.getFirstUnallocated(ArgGPRs); in createVarArgAreaAndStoreRegisters() 1540 FuncInfo->setVarArgsFPOffset(ArgGPRs.size() * 8 + NumXMMRegs * 16); in createVarArgAreaAndStoreRegisters() 1542 ArgGPRs.size() * 8 + ArgXMMs.size() * 16, Align(16), false)); in createVarArgAreaAndStoreRegisters() 1552 for (MCPhysReg Reg : ArgGPRs.slice(NumIntRegs)) { in createVarArgAreaAndStoreRegisters()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 3475 const MCPhysReg ArgGPRs[] = {LoongArch::R4, LoongArch::R5, LoongArch::R6, variable 3503 if (Register Reg = State.AllocateReg(ArgGPRs)) { in CC_LoongArchAssign2GRLen() 3520 if (Register Reg = State.AllocateReg(ArgGPRs)) { in CC_LoongArchAssign2GRLen() 3592 unsigned RegIdx = State.getFirstUnallocated(ArgGPRs); in CC_LoongArch() 3594 if (RegIdx != std::size(ArgGPRs) && RegIdx % 2 == 1) in CC_LoongArch() 3595 State.AllocateReg(ArgGPRs); in CC_LoongArch() 3647 Reg = State.AllocateReg(ArgGPRs); in CC_LoongArch() 3916 ArrayRef<MCPhysReg> ArgRegs = ArrayRef(ArgGPRs); in LowerFormalArguments()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 17366 ArrayRef<MCPhysReg> ArgGPRs = RISCV::getArgGPRs(STI.getTargetABI()); in CC_RISCVAssign2XLen() local 17368 if (Register Reg = State.AllocateReg(ArgGPRs)) { in CC_RISCVAssign2XLen() 17389 if (Register Reg = State.AllocateReg(ArgGPRs)) { in CC_RISCVAssign2XLen() 17493 ArrayRef<MCPhysReg> ArgGPRs = RISCV::getArgGPRs(ABI); in CC_RISCV() local 17509 unsigned RegIdx = State.getFirstUnallocated(ArgGPRs); in CC_RISCV() 17511 if (RegIdx != std::size(ArgGPRs) && RegIdx % 2 == 1) in CC_RISCV() 17512 State.AllocateReg(ArgGPRs); in CC_RISCV() 17530 Register Reg = State.AllocateReg(ArgGPRs); in CC_RISCV() 17539 Register HiReg = State.AllocateReg(ArgGPRs); in CC_RISCV() 17607 if ((Reg = State.AllocateReg(ArgGPRs))) { in CC_RISCV() [all …]
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