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Searched refs:AndNode (Results 1 – 6 of 6) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/IR/
H A DAutoUpgrade.cpp1935 Value* AndNode = Builder.CreateAnd(Mask, APInt(8, 1)); in upgradeMaskedMove() local
1936 Value* Cmp = Builder.CreateIsNotNull(AndNode); in upgradeMaskedMove()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp22071 SDNode *AndNode, SelectionDAG &DAG, in performSubsToAndsCombine() argument
22088 ConstantSDNode *AndC = dyn_cast<ConstantSDNode>(AndNode->getOperand(1)); in performSubsToAndsCombine()
22097 AArch64ISD::ANDS, DL, SubsNode->getVTList(), AndNode->getOperand(0), in performSubsToAndsCombine()
22132 SDNode *AndNode = SubsNode->getOperand(0).getNode(); in performCONDCombine() local
22135 if (AndNode->getOpcode() != ISD::AND) in performCONDCombine()
22138 if (SDValue Val = performSubsToAndsCombine(N, SubsNode, AndNode, DAG, CCIndex, in performCONDCombine()
22142 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(AndNode->getOperand(1))) { in performCONDCombine()
22153 SDValue AddValue = AndNode->getOperand(0); in performCONDCombine()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp5043 SDValue AndNode = DAG.getNode(ISD::AND, DL, ShAmtVT, ShAmt, in ExpandIntRes_FunnelShift() local
5046 DAG.getSetCC(DL, ShAmtCCVT, AndNode, DAG.getConstant(0, DL, ShAmtVT), in ExpandIntRes_FunnelShift()
H A DTargetLowering.cpp8015 SDValue AndNode = DAG.getNode(ISD::AND, dl, ShAmtVT, ShAmt, in expandShiftParts() local
8017 SDValue Cond = DAG.getSetCC(dl, ShAmtCCVT, AndNode, in expandShiftParts()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp45061 SDValue AndNode = Cond.getOperand(0); in combineSelect() local
45062 if (AndNode.getOpcode() == ISD::AND && CC == ISD::SETEQ && in combineSelect()
45064 isOneConstant(AndNode.getOperand(1))) { in combineSelect()
45067 AndNode = DAG.getZExtOrTrunc(AndNode, DL, MVT::i8); in combineSelect()
45068 return DAG.getNode(ISD::SELECT, DL, VT, AndNode, RHS, LHS); in combineSelect()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp14633 auto AndNode = DAG.getNode(ISD::AND, SDLoc(N), CountZeroes.getValueType(), in foldSelectOfCTTZOrCTLZ() local
14635 return DAG.getZExtOrTrunc(AndNode, SDLoc(N), N->getValueType(0)); in foldSelectOfCTTZOrCTLZ()