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Searched refs:AndInst (Results 1 – 3 of 3) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp135 bool tryOptAndIntoCompareBranch(MachineInstr &AndInst, bool Invert,
1605 MachineInstr &AndInst, bool Invert, MachineBasicBlock *DstMBB, in tryOptAndIntoCompareBranch() argument
1607 assert(AndInst.getOpcode() == TargetOpcode::G_AND && "Expected G_AND only?"); in tryOptAndIntoCompareBranch()
1630 AndInst.getOperand(2).getReg(), *MIB.getMRI()); in tryOptAndIntoCompareBranch()
1638 Register TestReg = AndInst.getOperand(1).getReg(); in tryOptAndIntoCompareBranch()
1706 MachineInstr *AndInst = getOpcodeDef(TargetOpcode::G_AND, LHS, MRI); in tryOptCompareBranchFedByICmp() local
1713 if (VRegAndVal && !AndInst) { in tryOptCompareBranchFedByICmp()
1750 AndInst = getOpcodeDef(TargetOpcode::G_AND, LHS, MRI); in tryOptCompareBranchFedByICmp()
1760 if (AndInst && in tryOptCompareBranchFedByICmp()
1762 *AndInst, /*Invert = */ Pred == CmpInst::ICMP_NE, DestMBB, MIB)) { in tryOptCompareBranchFedByICmp()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86InstructionSelector.cpp875 MachineInstr &AndInst = in selectZext() local
880 constrainSelectedInstRegOperands(AndInst, TII, TRI, RBI); in selectZext()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp4465 const auto *AndInst = dyn_cast<const Instruction>(*ExtInst->user_begin()); in canGetThrough() local
4466 if (AndInst && AndInst->getOpcode() == Instruction::And) { in canGetThrough()
4467 const auto *Cst = dyn_cast<ConstantInt>(AndInst->getOperand(1)); in canGetThrough()