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Searched refs:AddrIdx (Results 1 – 6 of 6) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp124 void sandboxLoadStoreStackChange(const MCInst &MI, unsigned AddrIdx, in sandboxLoadStoreStackChange() argument
130 unsigned BaseReg = MI.getOperand(AddrIdx).getReg(); in sandboxLoadStoreStackChange()
157 unsigned AddrIdx = 0; in emitInstruction() local
159 bool IsMemAccess = isBasePlusOffsetMemoryAccess(Inst.getOpcode(), &AddrIdx, in emitInstruction()
164 && baseRegNeedsLoadStoreMask(Inst.getOperand(AddrIdx) in emitInstruction()
170 sandboxLoadStoreStackChange(Inst, AddrIdx, STI, MaskBefore, MaskAfter); in emitInstruction()
210 bool isBasePlusOffsetMemoryAccess(unsigned Opcode, unsigned *AddrIdx, in isBasePlusOffsetMemoryAccess() argument
231 *AddrIdx = 1; in isBasePlusOffsetMemoryAccess()
242 *AddrIdx = 1; in isBasePlusOffsetMemoryAccess()
250 *AddrIdx = 2; in isBasePlusOffsetMemoryAccess()
H A DMipsMCNaCl.h20 bool isBasePlusOffsetMemoryAccess(unsigned Opcode, unsigned *AddrIdx,
/freebsd-14.2/contrib/llvm-project/llvm/lib/DebugInfo/GSYM/
H A DGsymReader.cpp268 for (uint64_t AddrIdx = FirstAddrIdx; AddrIdx < NumAddresses; ++AddrIdx) { in getFunctionInfoDataForAddress() local
269 auto ExpextedData = getFunctionInfoDataAtIndex(AddrIdx, FuncStartAddr); in getFunctionInfoDataForAddress()
300 GsymReader::getFunctionInfoDataAtIndex(uint64_t AddrIdx, in getFunctionInfoDataAtIndex() argument
302 if (AddrIdx >= getNumAddresses()) in getFunctionInfoDataAtIndex()
304 "invalid address index %" PRIu64, AddrIdx); in getFunctionInfoDataAtIndex()
305 const uint32_t AddrInfoOffset = AddrInfoOffsets[AddrIdx]; in getFunctionInfoDataAtIndex()
313 std::optional<uint64_t> OptFuncStartAddr = getAddress(AddrIdx); in getFunctionInfoDataAtIndex()
316 "failed to extract address[%" PRIu64 "]", AddrIdx); in getFunctionInfoDataAtIndex()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/DebugInfo/GSYM/
H A DGsymReader.h116 llvm::Expected<FunctionInfo> getFunctionInfoAtIndex(uint64_t AddrIdx) const;
359 getFunctionInfoDataAtIndex(uint64_t AddrIdx, uint64_t &FuncStartAddr) const;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSILoadStoreOptimizer.cpp120 int AddrIdx[MaxAddressRegs]; member
131 const MachineOperand &AddrRegNext = MI.getOperand(AddrIdx[i]); in hasSameBaseAddress()
782 AddrIdx[NumAddresses++] = in setMI()
785 AddrIdx[NumAddresses++] = in setMI()
788 AddrIdx[NumAddresses++] = in setMI()
791 AddrIdx[NumAddresses++] = AMDGPU::getNamedOperandIdx( in setMI()
794 AddrIdx[NumAddresses++] = in setMI()
797 AddrIdx[NumAddresses++] = in setMI()
800 AddrIdx[NumAddresses++] = in setMI()
803 AddrIdx[NumAddresses++] = AMDGPU::getNamedOperandIdx( in setMI()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsDelaySlotFiller.cpp736 unsigned AddrIdx; in searchRange() local
737 if ((isBasePlusOffsetMemoryAccess(CurrI->getOpcode(), &AddrIdx) && in searchRange()
738 baseRegNeedsLoadStoreMask(CurrI->getOperand(AddrIdx).getReg())) || in searchRange()