| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 663 AVGCEILU, enumerator
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| H A D | TargetLowering.h | 2798 case ISD::AVGCEILU: in isCommutativeBinOp()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86IntrinsicsInfo.h | 375 X86_INTRINSIC_DATA(avx2_pavg_b, INTR_TYPE_2OP, ISD::AVGCEILU, 0),
376 X86_INTRINSIC_DATA(avx2_pavg_w, INTR_TYPE_2OP, ISD::AVGCEILU, 0),
834 X86_INTRINSIC_DATA(avx512_pavg_b_512, INTR_TYPE_2OP, ISD::AVGCEILU, 0),
835 X86_INTRINSIC_DATA(avx512_pavg_w_512, INTR_TYPE_2OP, ISD::AVGCEILU, 0),
1297 X86_INTRINSIC_DATA(sse2_pavg_b, INTR_TYPE_2OP, ISD::AVGCEILU, 0),
1298 X86_INTRINSIC_DATA(sse2_pavg_w, INTR_TYPE_2OP, ISD::AVGCEILU, 0),
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| H A D | X86ISelLowering.cpp | 1048 setOperationAction(ISD::AVGCEILU, MVT::v16i8, Legal); in X86TargetLowering()
1049 setOperationAction(ISD::AVGCEILU, MVT::v8i16, Legal); in X86TargetLowering()
1511 setOperationAction(ISD::AVGCEILU, MVT::v16i16, HasInt256 ? Legal : Custom); in X86TargetLowering()
1512 setOperationAction(ISD::AVGCEILU, MVT::v32i8, HasInt256 ? Legal : Custom); in X86TargetLowering()
1841 setOperationAction(ISD::AVGCEILU, MVT::v32i16, HasBWI ? Legal : Custom); in X86TargetLowering()
1842 setOperationAction(ISD::AVGCEILU, MVT::v64i8, HasBWI ? Legal : Custom); in X86TargetLowering()
31994 case ISD::AVGCEILU: return LowerAVG(Op, Subtarget, DAG); in LowerOperation()
49866 return DAG.getNode(ISD::AVGCEILU, DL, Ops[0].getValueType(), Ops); in detectAVGPattern()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 243 case ISD::AVGCEILU: return "avgceilu"; in getOperationName()
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| H A D | SelectionDAG.cpp | 3387 case ISD::AVGCEILU: { in computeKnownBits()
5976 case ISD::AVGCEILU: { in FoldValue()
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| H A D | LegalizeVectorTypes.cpp | 4154 case ISD::AVGCEILU: in WidenVectorResult()
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| H A D | TargetLowering.cpp | 1039 unsigned AVGOpc = IsCeil ? (IsSigned ? ISD::AVGCEILS : ISD::AVGCEILU) in combineShiftToAVG()
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| H A D | DAGCombiner.cpp | 1957 case ISD::AVGCEILU: return visitAVG(N); in visit()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 865 {ISD::AVGFLOORS, ISD::AVGFLOORU, ISD::AVGCEILS, ISD::AVGCEILU}, VT, in initActions()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 396 def avgceilu : SDNode<"ISD::AVGCEILU" , SDTIntBinOp, [SDNPCommutative]>;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1178 setOperationAction(ISD::AVGCEILU, VT, Legal); in AArch64TargetLowering()
1357 setOperationAction(ISD::AVGCEILU, VT, Custom); in AArch64TargetLowering()
5450 : (IsRoundingAdd ? ISD::AVGCEILU : ISD::AVGFLOORU); in LowerINTRINSIC_WO_CHAIN()
6370 case ISD::AVGCEILU: in LowerOperation()
14412 (Op->getOpcode() == ISD::AVGCEILS || Op->getOpcode() == ISD::AVGCEILU); in LowerAVG()
18239 (N0Opc == ISD::AVGCEILU || N0Opc == ISD::AVGCEILS || in performConcatVectorsCombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 817 setOperationAction({ISD::AVGFLOORU, ISD::AVGCEILU, ISD::SADDSAT, in RISCVTargetLowering()
1189 setOperationAction({ISD::AVGFLOORU, ISD::AVGCEILU, ISD::SADDSAT, in RISCVTargetLowering()
5583 OP_CASE(AVGCEILU) in getRISCVVLOp()
6579 case ISD::AVGCEILU: in LowerOperation()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 280 setOperationAction(ISD::AVGCEILU, VT, Legal); in addMVEVectorTypes()
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