| /freebsd-14.2/contrib/llvm-project/compiler-rt/lib/builtins/hexagon/ |
| H A D | fastmath2_ldlib_asm.S | 89 lmanta = ASR(lmanta, expa)
90 lmantb = ASR(lmantb, expb)
188 lmanta = ASR(lmanta, expa)
189 lmantb = ASR(lmantb, expb)
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| H A D | fastmath_dlib_asm.S | 104 lmanta = ASR(lmanta, expa)
105 lmantb = ASR(lmantb, expb)
239 lmanta = ASR(lmanta, expa)
240 lmantb = ASR(lmantb, expb)
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| H A D | fastmath2_dlib_asm.S | 96 lmanta = ASR(lmanta, expa)
97 lmantb = ASR(lmantb, expb)
197 lmanta = ASR(lmanta, expa)
198 lmantb = ASR(lmantb, expb)
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| H A D | dfdiv.S | 169 DIV_ITER1B(ASR,1,15,)
170 DIV_ITER1B(ASR,16,15,)
171 DIV_ITER1B(ASR,31,15,PROD=# ( 0 );)
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| H A D | dfaddsub.S | 117 BTMP = ASR(BTMP,EXPDIFF)
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kInstrShiftRotate.td | 15 /// SHL [~] ASR [~] LSR [~] SWAP [ ]
95 defm ASR : MxSROp<"asr", sra, MxRODI_R, MxROOP_AS>;
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 36 ASR, enumerator
57 case AArch64_AM::ASR: return "asr"; in getShiftExtendName()
78 case 2: return AArch64_AM::ASR; in getShiftType()
106 case AArch64_AM::ASR: STEnc = 2; break; in getShifterImm()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.h | 48 ASR, ///< Arithmetic shift right. enumerator
|
| H A D | AVRISelLowering.cpp | 258 NODE(ASR); in getTargetNodeName()
374 Opc8 = AVRISD::ASR; in LowerShifts()
|
| /freebsd-14.2/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
| H A D | ARMUtils.h | 157 static inline uint32_t ASR(const uint32_t value, const uint32_t amount, in ASR() function
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedA510.td | 678 (instregex "^(ASR|LSL|LSR)_WIDE_ZPmZ_[BHS]",
679 "^(ASR|LSL|LSR)_WIDE_ZZZ_[BHS]",
680 "^(ASR|LSL|LSR)_ZPmI_[BHSD]",
681 "^(ASR|LSL|LSR)_ZPZI_[BHSD]",
682 "^(ASR|LSL|LSR)_ZPmZ_[BHSD]",
683 "^(ASR|LSL|LSR)_ZPZZ_[BHSD]",
684 "^(ASR|LSL|LSR)_ZZI_[BHSD]",
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| H A D | AArch64SchedNeoverseV1.td | 525 // Arithmetic, LSR/ASR/ROR shift or LSL shift > 4
532 // Arithmetic, flagset, LSR/ASR/ROR shift or LSL shift > 4
1390 (instregex "^(ASR|LSL|LSR)_WIDE_Z(Pm|Z)Z_[BHS]",
1391 "^(ASR|LSL|LSR)_ZPm[IZ]_[BHSD]",
1392 "^(ASR|LSL|LSR)_ZZI_[BHSD]",
1393 "^(ASR|LSL|LSR)_ZPZ[IZ]_[BHSD]",
|
| H A D | AArch64SchedPredicates.td | 56 def CheckShiftASR : CheckImmOperand_s<3, "AArch64_AM::ASR">;
|
| H A D | AArch64SchedNeoverseN2.td | 653 // Arithmetic, LSR/ASR/ROR shift or LSL shift > 4
1623 (instregex "^(ASR|LSL|LSR)_WIDE_ZPmZ_[BHS]$",
1624 "^(ASR|LSL|LSR)_WIDE_ZZZ_[BHS]$",
1625 "^(ASR|LSL|LSR)_ZPmI_[BHSD]$",
1626 "^(ASR|LSL|LSR)_ZPmZ_[BHSD]$",
1627 "^(ASR|LSL|LSR)_ZZI_[BHSD]$",
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| H A D | AArch64SchedNeoverseV2.td | 1121 // Arithmetic, LSR/ASR/ROR shift or LSL shift > 4
2132 (instregex "^(ASR|LSL|LSR)_WIDE_ZPmZ_[BHS]",
2133 "^(ASR|LSL|LSR)_WIDE_ZZZ_[BHS]",
2134 "^(ASR|LSL|LSR)_ZPmI_[BHSD]",
2135 "^(ASR|LSL|LSR)_ZPmZ_[BHSD]",
2136 "^(ASR|LSL|LSR)_ZZI_[BHSD]",
2137 "^(ASR|LSL|LSR)_ZPZ[IZ]_[BHSD]",
|
| H A D | AArch64FastISel.cpp | 1272 case Instruction::AShr: ShiftType = AArch64_AM::ASR; break; in emitAddSub()
3723 emitSubs_rs(VT, SMULHReg, MulReg, AArch64_AM::ASR, 63, in fastLowerIntrinsicCall()
4929 AArch64_AM::ASR, Lg2); in selectSDiv()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcRegisterInfo.td | 380 // from the ASR (as ASR4) or the privileged register set.
383 (add Y, TICK, (sequence "ASR%u", 1, 31))>;
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | FunctionComparator.cpp | 781 unsigned int ASR = GEPR->getPointerAddressSpace(); in cmpGEPs() local
783 if (int Res = cmpNumbers(ASL, ASR)) in cmpGEPs()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 600 ASR, enumerator
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleM7.td | 338 def : InstRW<[WriteALUsi], (instregex "(t|t2)(LSL|LSR|ASR|ROR)")>;
|
| H A D | ARMInstrThumb.td | 1077 // ASR immediate
1088 // ASR register
|
| H A D | ARMScheduleM85.td | 439 (instregex "(t|t2)(LSL|LSR|ASR|ROR|SBFX|UBFX)", "t2MOVsr(a|l)")>;
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1475 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR || in isShifter()
1577 ST == AArch64_AM::ASR) && getShiftExtendAmount() < width; in isArithmeticShifter()
1588 ST == AArch64_AM::ASR || ST == AArch64_AM::ROR) && in isLogicalShifter()
3564 .Case("asr", AArch64_AM::ASR) in tryParseOptionalShiftExtend()
3587 ShOp == AArch64_AM::ASR || ShOp == AArch64_AM::ROR || in tryParseOptionalShiftExtend()
|
| /freebsd-14.2/share/misc/ |
| H A D | pci_vendors | 37667 9005 0296 ASR-2240S
37669 9005 0298 ASR-4000
37698 9005 02d4 ASR-2045
37699 9005 02d5 ASR-2405
37700 9005 02d6 ASR-2445
37701 9005 02d7 ASR-2805
37709 9005 02df ASR-2045G
37710 9005 02e0 ASR-2405G
37711 9005 02e1 ASR-2445G
37712 9005 02e2 ASR-2805G
[all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.td | 304 defm ASR : ArcBinaryEXT5Inst<0b000010, "asr">;
|