| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64MacroFusion.cpp | 164 if ((FirstMI == nullptr || FirstMI->getOpcode() == AArch64::ADRP) && in isAdrpAddPair()
231 case AArch64::ADRP: in isAddressLdStPair()
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| H A D | AArch64CollectLOH.cpp | 176 case AArch64::ADRP: in canDefBePartOfLOH()
574 case AArch64::ADRP: in runOnMachineFunction()
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| H A D | AArch64SchedPredExynos.td | 122 [ADR, ADRP,
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| H A D | AArch64AsmPrinter.cpp | 775 MCInstBuilder(AArch64::ADRP) in emitHwasanMemaccessSymbols()
1477 if (MI->getOpcode() == AArch64::ADRP) { in emitInstruction()
1659 Adrp.setOpcode(AArch64::ADRP); in emitInstruction()
1907 Adrp.setOpcode(AArch64::ADRP); in emitMachOIFuncStubBody()
2020 Adrp.setOpcode(AArch64::ADRP); in emitMachOIFuncStubHelperBody()
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| H A D | AArch64ExpandPseudoInsts.cpp | 1273 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg); in expandMI()
1329 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg) in expandMI()
1351 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ADRP), DstReg) in expandMI()
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| H A D | AArch64ISelLowering.h | 75 ADRP, // Page address of a TargetGlobalAddress operand. enumerator
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| H A D | AArch64FastISel.cpp | 434 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(AArch64::ADRP), in materializeFP()
466 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(AArch64::ADRP), in materializeGV()
498 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(AArch64::ADRP), in materializeGV()
3243 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(AArch64::ADRP), in fastLowerCall()
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| H A D | AArch64SchedCyclone.td | 141 // ADR,ADRP
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| H A D | AArch64SchedExynosM3.td | 510 def : InstRW<[M3WriteZ0], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedTSV110.td | 410 def : InstRW<[TSV110Wr_1cyc_1ALUAB], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedAmpere1.td | 983 def : InstRW<[Ampere1Write_1cyc_1A], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedAmpere1B.td | 965 def : InstRW<[Ampere1BWrite_1cyc_1A], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedExynosM4.td | 607 def : InstRW<[M4WriteZ0], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedExynosM5.td | 654 def : InstRW<[M5WriteZ0], (instrs ADR, ADRP)>;
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| H A D | AArch64InstrInfo.cpp | 278 BuildMI(MBB, MBB.end(), DL, get(AArch64::ADRP), Reg) in insertIndirectBranch()
1968 BuildMI(MBB, FirstEpilogSEH, DL, TII->get(AArch64::ADRP)) in expandPostRAPseudo()
2090 BuildMI(MBB, MI, DL, get(AArch64::ADRP), Reg) in expandPostRAPseudo()
8853 if (MI.getOpcode() == AArch64::ADRP) in getOutliningTypeImpl()
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| H A D | AArch64SchedFalkorDetails.td | 1233 def : InstRW<[FalkorWr_1XYZB_0cyc], (instregex "^ADRP?$")>; // imm fwd
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| H A D | AArch64ISelLowering.cpp | 2359 MAKE_CASE(AArch64ISD::ADRP) in getTargetNodeName()
8452 SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, Ty, Hi); in getAddr() local
8453 return DAG.getNode(AArch64ISD::ADDlow, DL, Ty, ADRP, Lo); in getAddr()
8815 SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, TLSIndexHi); in LowerWindowsGlobalTLSAddress() local
8817 DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, TLSIndexLo); in LowerWindowsGlobalTLSAddress()
25623 case AArch64::ADRP: in shouldLocalize()
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| H A D | AArch64InstrInfo.td | 618 def AArch64adrp : SDNode<"AArch64ISD::ADRP", SDTIntUnaryOp, []>;
2774 def ADRP : ADRI<1, "adrp", adrplabel,
2783 def : Pat<(AArch64adrp tconstpool:$cp), (ADRP tconstpool:$cp)>;
2784 def : Pat<(AArch64adrp tblockaddress:$cp), (ADRP tblockaddress:$cp)>;
2785 def : Pat<(AArch64adrp texternalsym:$sym), (ADRP texternalsym:$sym)>;
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| H A D | AArch64SchedNeoverseV2.td | 1205 def : InstRW<[V2Write_1cyc_1F], (instrs ADR, ADRP)>;
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64ExternalSymbolizer.cpp | 94 } else if (MI.getOpcode() == AArch64::ADRP) { in tryAddingSymbolicOperand()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 1331 auto ADRP = MIRBuilder.buildInstr(AArch64::ADRP, {LLT::pointer(0, 64)}, {}) in legalizeSmallCMGlobalValue() local
1334 MRI.setRegClass(ADRP.getReg(0), &AArch64::GPR64RegClass); in legalizeSmallCMGlobalValue()
1352 ADRP = MIRBuilder.buildInstr(AArch64::MOVKXi, {LLT::pointer(0, 64)}, {ADRP}) in legalizeSmallCMGlobalValue()
1356 MRI.setRegClass(ADRP.getReg(0), &AArch64::GPR64RegClass); in legalizeSmallCMGlobalValue()
1359 MIRBuilder.buildInstr(AArch64::G_ADD_LOW, {DstReg}, {ADRP}) in legalizeSmallCMGlobalValue()
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| H A D | AArch64InstructionSelector.cpp | 2552 if (BaseMI->getOpcode() != AArch64::ADRP) { in select()
4343 MIRBuilder.buildInstr(AArch64::ADRP, {&AArch64::GPR64RegClass}, {}) in emitLoadFromConstantPool()
7310 if (Adrp.getOpcode() != AArch64::ADRP) in tryFoldAddLowIntoImm()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCTargetDesc.cpp | 425 else if (Inst.getOpcode() == AArch64::ADRP) in evaluateBranch()
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| H A D | AArch64InstPrinter.cpp | 1809 if (MI->getOpcode() == AArch64::ADRP) { in printAdrAdrpLabel()
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