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Searched refs:vs2 (Results 1 – 15 of 15) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoV.td239 // op vd, vs2, vs1, vm
253 // op vd, vs1, vs2, vm (reverse the order of vs1 and vs2)
259 // op vd, vs2, vs1
267 // op vd, vs2, rs1, vm
281 // op vd, rs1, vs2, vm (reverse the order of rs1 and vs2)
287 // op vd, vs1, vs2
295 // op vd, vs2, imm, vm
309 // op vd, vs2, imm, vm
1403 let vs2 = 0 in
1411 (ins VR:$vs2), "vmv.x.s", "$vd, $vs2">,
[all …]
H A DRISCVInstrFormatsV.td122 bits<5> vs2;
129 let Inst{24-20} = vs2;
142 bits<5> vs2;
149 let Inst{24-20} = vs2;
168 let Inst{24-20} = vs2;
181 bits<5> vs2;
188 let Inst{24-20} = vs2;
201 bits<5> vs2;
264 bits<5> vs2;
328 bits<5> vs2;
[all …]
H A DRISCVInstrInfoVPseudos.td1067 Op1Class:$vs2,
1085 Op1Class:$vs2,
2437 (op1_type op1_reg_class:$vs2),
2441 $rs1, $vs2, $vd,
2455 (op1_type op1_reg_class:$vs2),
2460 $rs1, $vs2, $vd,
3280 def PseudoVMV1R_V : VPseudo<VMV1R_V, V_M1, (outs VR:$vd), (ins VR:$vs2)>;
3281 def PseudoVMV2R_V : VPseudo<VMV2R_V, V_M2, (outs VRM2:$vd), (ins VRM2:$vs2)>;
3282 def PseudoVMV4R_V : VPseudo<VMV4R_V, V_M4, (outs VRM4:$vd), (ins VRM4:$vs2)>;
3283 def PseudoVMV8R_V : VPseudo<VMV8R_V, V_M8, (outs VRM8:$vd), (ins VRM8:$vs2)>;
/freebsd-13.1/sys/net/
H A Dvnet.c479 struct vnet_sysinit *vs, *vs2; in vnet_register_sysinit() local
488 if (vs2->subsystem > vs->subsystem) in vnet_register_sysinit()
490 if (vs2->subsystem == vs->subsystem && vs2->order > vs->order) in vnet_register_sysinit()
493 if (vs2 != NULL) in vnet_register_sysinit()
494 TAILQ_INSERT_BEFORE(vs2, vs, link); in vnet_register_sysinit()
526 struct vnet_sysinit *vs, *vs2; in vnet_register_sysuninit() local
532 TAILQ_FOREACH(vs2, &vnet_destructors, link) { in vnet_register_sysuninit()
533 if (vs2->subsystem > vs->subsystem) in vnet_register_sysuninit()
535 if (vs2->subsystem == vs->subsystem && vs2->order > vs->order) in vnet_register_sysuninit()
538 if (vs2 != NULL) in vnet_register_sysuninit()
[all …]
/freebsd-13.1/sys/contrib/device-tree/src/arm/
H A Dqcom-pm8941.dtsi163 interrupt-names = "ocp-5vs1", "ocp-5vs2";
182 pm8941_5vs2: 5vs2 {
/freebsd-13.1/sys/contrib/openzfs/module/zfs/
H A Dspa_stats.c433 vdev_get_stats(spa->spa_root_vdev, &ts->vs2); in spa_txg_history_fini_io()
438 ts->vs2.vs_bytes[ZIO_TYPE_READ] - ts->vs1.vs_bytes[ZIO_TYPE_READ], in spa_txg_history_fini_io()
439 ts->vs2.vs_bytes[ZIO_TYPE_WRITE] - ts->vs1.vs_bytes[ZIO_TYPE_WRITE], in spa_txg_history_fini_io()
440 ts->vs2.vs_ops[ZIO_TYPE_READ] - ts->vs1.vs_ops[ZIO_TYPE_READ], in spa_txg_history_fini_io()
441 ts->vs2.vs_ops[ZIO_TYPE_WRITE] - ts->vs1.vs_ops[ZIO_TYPE_WRITE], in spa_txg_history_fini_io()
/freebsd-13.1/sys/dev/ntb/test/
H A Dntb_tool.c460 bool vs1, vs2, vs3; in parse_mw_buf() local
463 vs1 = vs2 = vs3 = false; in parse_mw_buf()
475 vs2 = true; in parse_mw_buf()
484 } else if (!vs2 && !strcmp(op2, "nbytes")) { in parse_mw_buf()
486 vs2 = true; in parse_mw_buf()
494 } else if (!vs2 && !strcmp(op3, "nbytes")) { in parse_mw_buf()
/freebsd-13.1/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DRegisterInfos_ppc64le.h211 DEFINE_VSX(vs2, LLDB_INVALID_REGNUM), \
396 uint32_t vs2[4]; member
/freebsd-13.1/sys/contrib/device-tree/Bindings/regulator/
H A Dqcom,smd-rpm-regulator.yaml34 lvs3, 5vs1, 5vs2
H A Dmt6358-regulator.txt83 regulator-name = "vs2";
H A Dqcom,smd-rpm-regulator.txt255 lvs3, 5vs1, 5vs2
H A Dqcom,spmi-regulator.txt180 5vs1, 5vs2
/freebsd-13.1/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt6358.dtsi80 regulator-name = "vs2";
/freebsd-13.1/sys/contrib/openzfs/include/sys/
H A Dspa.h935 vdev_stat_t vs2; member
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrPrefix.td1589 (INSERT_SUBREG (IMPLICIT_DEF), $vs2, sub_vsx1),
1608 def : Pat<(v512i1 (PPCAccBuild v4i32:$vs1, v4i32:$vs0, v4i32:$vs3, v4i32:$vs2)),
1611 v16i8:$vs3, v16i8:$vs2)),