1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2010 Fabien Thomas
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 /*
30 * Intel Uncore PMCs.
31 */
32
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35
36 #include <sys/param.h>
37 #include <sys/bus.h>
38 #include <sys/pmc.h>
39 #include <sys/pmckern.h>
40 #include <sys/systm.h>
41
42 #include <machine/intr_machdep.h>
43 #if (__FreeBSD_version >= 1100000)
44 #include <x86/apicvar.h>
45 #else
46 #include <machine/apicvar.h>
47 #endif
48 #include <machine/cpu.h>
49 #include <machine/cpufunc.h>
50 #include <machine/specialreg.h>
51
52 #define UCF_PMC_CAPS \
53 (PMC_CAP_READ | PMC_CAP_WRITE)
54
55 #define UCP_PMC_CAPS \
56 (PMC_CAP_EDGE | PMC_CAP_THRESHOLD | PMC_CAP_READ | PMC_CAP_WRITE | \
57 PMC_CAP_INVERT | PMC_CAP_QUALIFIER | PMC_CAP_PRECISE)
58
59 #define SELECTSEL(x) \
60 (((x) == PMC_CPU_INTEL_SANDYBRIDGE || (x) == PMC_CPU_INTEL_HASWELL) ? \
61 UCP_CB0_EVSEL0 : UCP_EVSEL0)
62
63 #define SELECTOFF(x) \
64 (((x) == PMC_CPU_INTEL_SANDYBRIDGE || (x) == PMC_CPU_INTEL_HASWELL) ? \
65 UCF_OFFSET_SB : UCF_OFFSET)
66
67 static enum pmc_cputype uncore_cputype;
68
69 struct uncore_cpu {
70 volatile uint32_t pc_resync;
71 volatile uint32_t pc_ucfctrl; /* Fixed function control. */
72 volatile uint64_t pc_globalctrl; /* Global control register. */
73 struct pmc_hw pc_uncorepmcs[];
74 };
75
76 static struct uncore_cpu **uncore_pcpu;
77
78 static uint64_t uncore_pmcmask;
79
80 static int uncore_ucf_ri; /* relative index of fixed counters */
81 static int uncore_ucf_width;
82 static int uncore_ucf_npmc;
83
84 static int uncore_ucp_width;
85 static int uncore_ucp_npmc;
86
87 static int
uncore_pcpu_noop(struct pmc_mdep * md,int cpu)88 uncore_pcpu_noop(struct pmc_mdep *md, int cpu)
89 {
90 (void) md;
91 (void) cpu;
92 return (0);
93 }
94
95 static int
uncore_pcpu_init(struct pmc_mdep * md,int cpu)96 uncore_pcpu_init(struct pmc_mdep *md, int cpu)
97 {
98 struct pmc_cpu *pc;
99 struct uncore_cpu *cc;
100 struct pmc_hw *phw;
101 int uncore_ri, n, npmc;
102
103 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
104 ("[ucf,%d] insane cpu number %d", __LINE__, cpu));
105
106 PMCDBG1(MDP,INI,1,"uncore-init cpu=%d", cpu);
107
108 uncore_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_ri;
109 npmc = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_num;
110 npmc += md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCF].pcd_num;
111
112 cc = malloc(sizeof(struct uncore_cpu) + npmc * sizeof(struct pmc_hw),
113 M_PMC, M_WAITOK | M_ZERO);
114
115 uncore_pcpu[cpu] = cc;
116 pc = pmc_pcpu[cpu];
117
118 KASSERT(pc != NULL && cc != NULL,
119 ("[uncore,%d] NULL per-cpu structures cpu=%d", __LINE__, cpu));
120
121 for (n = 0, phw = cc->pc_uncorepmcs; n < npmc; n++, phw++) {
122 phw->phw_state = PMC_PHW_FLAG_IS_ENABLED |
123 PMC_PHW_CPU_TO_STATE(cpu) |
124 PMC_PHW_INDEX_TO_STATE(n + uncore_ri);
125 phw->phw_pmc = NULL;
126 pc->pc_hwpmcs[n + uncore_ri] = phw;
127 }
128
129 return (0);
130 }
131
132 static int
uncore_pcpu_fini(struct pmc_mdep * md,int cpu)133 uncore_pcpu_fini(struct pmc_mdep *md, int cpu)
134 {
135 int uncore_ri, n, npmc;
136 struct pmc_cpu *pc;
137 struct uncore_cpu *cc;
138
139 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
140 ("[uncore,%d] insane cpu number (%d)", __LINE__, cpu));
141
142 PMCDBG1(MDP,INI,1,"uncore-pcpu-fini cpu=%d", cpu);
143
144 if ((cc = uncore_pcpu[cpu]) == NULL)
145 return (0);
146
147 uncore_pcpu[cpu] = NULL;
148
149 pc = pmc_pcpu[cpu];
150
151 KASSERT(pc != NULL, ("[uncore,%d] NULL per-cpu %d state", __LINE__,
152 cpu));
153
154 npmc = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_num;
155 uncore_ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP].pcd_ri;
156
157 for (n = 0; n < npmc; n++)
158 wrmsr(SELECTSEL(uncore_cputype) + n, 0);
159
160 wrmsr(UCF_CTRL, 0);
161 npmc += md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCF].pcd_num;
162
163 for (n = 0; n < npmc; n++)
164 pc->pc_hwpmcs[n + uncore_ri] = NULL;
165
166 free(cc, M_PMC);
167
168 return (0);
169 }
170
171 /*
172 * Fixed function counters.
173 */
174
175 static pmc_value_t
ucf_perfctr_value_to_reload_count(pmc_value_t v)176 ucf_perfctr_value_to_reload_count(pmc_value_t v)
177 {
178
179 /* If the PMC has overflowed, return a reload count of zero. */
180 if ((v & (1ULL << (uncore_ucf_width - 1))) == 0)
181 return (0);
182 v &= (1ULL << uncore_ucf_width) - 1;
183 return (1ULL << uncore_ucf_width) - v;
184 }
185
186 static pmc_value_t
ucf_reload_count_to_perfctr_value(pmc_value_t rlc)187 ucf_reload_count_to_perfctr_value(pmc_value_t rlc)
188 {
189 return (1ULL << uncore_ucf_width) - rlc;
190 }
191
192 static int
ucf_allocate_pmc(int cpu,int ri,struct pmc * pm,const struct pmc_op_pmcallocate * a)193 ucf_allocate_pmc(int cpu, int ri, struct pmc *pm,
194 const struct pmc_op_pmcallocate *a)
195 {
196 uint32_t caps, flags;
197
198 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
199 ("[uncore,%d] illegal CPU %d", __LINE__, cpu));
200
201 PMCDBG2(MDP,ALL,1, "ucf-allocate ri=%d reqcaps=0x%x", ri, pm->pm_caps);
202
203 if (ri < 0 || ri > uncore_ucf_npmc)
204 return (EINVAL);
205
206 caps = a->pm_caps;
207
208 if (a->pm_class != PMC_CLASS_UCF ||
209 (caps & UCF_PMC_CAPS) != caps)
210 return (EINVAL);
211
212 flags = UCF_EN;
213
214 pm->pm_md.pm_ucf.pm_ucf_ctrl = (flags << (ri * 4));
215
216 PMCDBG1(MDP,ALL,2, "ucf-allocate config=0x%jx",
217 (uintmax_t) pm->pm_md.pm_ucf.pm_ucf_ctrl);
218
219 return (0);
220 }
221
222 static int
ucf_config_pmc(int cpu,int ri,struct pmc * pm)223 ucf_config_pmc(int cpu, int ri, struct pmc *pm)
224 {
225 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
226 ("[uncore,%d] illegal CPU %d", __LINE__, cpu));
227
228 KASSERT(ri >= 0 && ri < uncore_ucf_npmc,
229 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
230
231 PMCDBG3(MDP,CFG,1, "ucf-config cpu=%d ri=%d pm=%p", cpu, ri, pm);
232
233 KASSERT(uncore_pcpu[cpu] != NULL, ("[uncore,%d] null per-cpu %d", __LINE__,
234 cpu));
235
236 uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc = pm;
237
238 return (0);
239 }
240
241 static int
ucf_describe(int cpu,int ri,struct pmc_info * pi,struct pmc ** ppmc)242 ucf_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
243 {
244 int error;
245 struct pmc_hw *phw;
246 char ucf_name[PMC_NAME_MAX];
247
248 phw = &uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri];
249
250 (void) snprintf(ucf_name, sizeof(ucf_name), "UCF-%d", ri);
251 if ((error = copystr(ucf_name, pi->pm_name, PMC_NAME_MAX,
252 NULL)) != 0)
253 return (error);
254
255 pi->pm_class = PMC_CLASS_UCF;
256
257 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
258 pi->pm_enabled = TRUE;
259 *ppmc = phw->phw_pmc;
260 } else {
261 pi->pm_enabled = FALSE;
262 *ppmc = NULL;
263 }
264
265 return (0);
266 }
267
268 static int
ucf_get_config(int cpu,int ri,struct pmc ** ppm)269 ucf_get_config(int cpu, int ri, struct pmc **ppm)
270 {
271 *ppm = uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc;
272
273 return (0);
274 }
275
276 static int
ucf_read_pmc(int cpu,int ri,pmc_value_t * v)277 ucf_read_pmc(int cpu, int ri, pmc_value_t *v)
278 {
279 struct pmc *pm;
280 pmc_value_t tmp;
281
282 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
283 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu));
284 KASSERT(ri >= 0 && ri < uncore_ucf_npmc,
285 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
286
287 pm = uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc;
288
289 KASSERT(pm,
290 ("[uncore,%d] cpu %d ri %d(%d) pmc not configured", __LINE__, cpu,
291 ri, ri + uncore_ucf_ri));
292
293 tmp = rdmsr(UCF_CTR0 + ri);
294
295 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
296 *v = ucf_perfctr_value_to_reload_count(tmp);
297 else
298 *v = tmp;
299
300 PMCDBG3(MDP,REA,1, "ucf-read cpu=%d ri=%d -> v=%jx", cpu, ri, *v);
301
302 return (0);
303 }
304
305 static int
ucf_release_pmc(int cpu,int ri,struct pmc * pmc)306 ucf_release_pmc(int cpu, int ri, struct pmc *pmc)
307 {
308 PMCDBG3(MDP,REL,1, "ucf-release cpu=%d ri=%d pm=%p", cpu, ri, pmc);
309
310 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
311 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu));
312 KASSERT(ri >= 0 && ri < uncore_ucf_npmc,
313 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
314
315 KASSERT(uncore_pcpu[cpu]->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc == NULL,
316 ("[uncore,%d] PHW pmc non-NULL", __LINE__));
317
318 return (0);
319 }
320
321 static int
ucf_start_pmc(int cpu,int ri)322 ucf_start_pmc(int cpu, int ri)
323 {
324 struct pmc *pm;
325 struct uncore_cpu *ucfc;
326
327 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
328 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu));
329 KASSERT(ri >= 0 && ri < uncore_ucf_npmc,
330 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
331
332 PMCDBG2(MDP,STA,1,"ucf-start cpu=%d ri=%d", cpu, ri);
333
334 ucfc = uncore_pcpu[cpu];
335 pm = ucfc->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc;
336
337 ucfc->pc_ucfctrl |= pm->pm_md.pm_ucf.pm_ucf_ctrl;
338
339 wrmsr(UCF_CTRL, ucfc->pc_ucfctrl);
340
341 do {
342 ucfc->pc_resync = 0;
343 ucfc->pc_globalctrl |= (1ULL << (ri + SELECTOFF(uncore_cputype)));
344 wrmsr(UC_GLOBAL_CTRL, ucfc->pc_globalctrl);
345 } while (ucfc->pc_resync != 0);
346
347 PMCDBG4(MDP,STA,1,"ucfctrl=%x(%x) globalctrl=%jx(%jx)",
348 ucfc->pc_ucfctrl, (uint32_t) rdmsr(UCF_CTRL),
349 ucfc->pc_globalctrl, rdmsr(UC_GLOBAL_CTRL));
350
351 return (0);
352 }
353
354 static int
ucf_stop_pmc(int cpu,int ri)355 ucf_stop_pmc(int cpu, int ri)
356 {
357 uint32_t fc;
358 struct uncore_cpu *ucfc;
359
360 PMCDBG2(MDP,STO,1,"ucf-stop cpu=%d ri=%d", cpu, ri);
361
362 ucfc = uncore_pcpu[cpu];
363
364 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
365 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu));
366 KASSERT(ri >= 0 && ri < uncore_ucf_npmc,
367 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
368
369 fc = (UCF_MASK << (ri * 4));
370
371 ucfc->pc_ucfctrl &= ~fc;
372
373 PMCDBG1(MDP,STO,1,"ucf-stop ucfctrl=%x", ucfc->pc_ucfctrl);
374 wrmsr(UCF_CTRL, ucfc->pc_ucfctrl);
375
376 do {
377 ucfc->pc_resync = 0;
378 ucfc->pc_globalctrl &= ~(1ULL << (ri + SELECTOFF(uncore_cputype)));
379 wrmsr(UC_GLOBAL_CTRL, ucfc->pc_globalctrl);
380 } while (ucfc->pc_resync != 0);
381
382 PMCDBG4(MDP,STO,1,"ucfctrl=%x(%x) globalctrl=%jx(%jx)",
383 ucfc->pc_ucfctrl, (uint32_t) rdmsr(UCF_CTRL),
384 ucfc->pc_globalctrl, rdmsr(UC_GLOBAL_CTRL));
385
386 return (0);
387 }
388
389 static int
ucf_write_pmc(int cpu,int ri,pmc_value_t v)390 ucf_write_pmc(int cpu, int ri, pmc_value_t v)
391 {
392 struct uncore_cpu *cc;
393 struct pmc *pm;
394
395 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
396 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu));
397 KASSERT(ri >= 0 && ri < uncore_ucf_npmc,
398 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
399
400 cc = uncore_pcpu[cpu];
401 pm = cc->pc_uncorepmcs[ri + uncore_ucf_ri].phw_pmc;
402
403 KASSERT(pm,
404 ("[uncore,%d] cpu %d ri %d pmc not configured", __LINE__, cpu, ri));
405
406 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
407 v = ucf_reload_count_to_perfctr_value(v);
408
409 wrmsr(UCF_CTRL, 0); /* Turn off fixed counters */
410 wrmsr(UCF_CTR0 + ri, v);
411 wrmsr(UCF_CTRL, cc->pc_ucfctrl);
412
413 PMCDBG4(MDP,WRI,1, "ucf-write cpu=%d ri=%d v=%jx ucfctrl=%jx ",
414 cpu, ri, v, (uintmax_t) rdmsr(UCF_CTRL));
415
416 return (0);
417 }
418
419
420 static void
ucf_initialize(struct pmc_mdep * md,int maxcpu,int npmc,int pmcwidth)421 ucf_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth)
422 {
423 struct pmc_classdep *pcd;
424
425 KASSERT(md != NULL, ("[ucf,%d] md is NULL", __LINE__));
426
427 PMCDBG0(MDP,INI,1, "ucf-initialize");
428
429 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCF];
430
431 pcd->pcd_caps = UCF_PMC_CAPS;
432 pcd->pcd_class = PMC_CLASS_UCF;
433 pcd->pcd_num = npmc;
434 pcd->pcd_ri = md->pmd_npmc;
435 pcd->pcd_width = pmcwidth;
436
437 pcd->pcd_allocate_pmc = ucf_allocate_pmc;
438 pcd->pcd_config_pmc = ucf_config_pmc;
439 pcd->pcd_describe = ucf_describe;
440 pcd->pcd_get_config = ucf_get_config;
441 pcd->pcd_get_msr = NULL;
442 pcd->pcd_pcpu_fini = uncore_pcpu_noop;
443 pcd->pcd_pcpu_init = uncore_pcpu_noop;
444 pcd->pcd_read_pmc = ucf_read_pmc;
445 pcd->pcd_release_pmc = ucf_release_pmc;
446 pcd->pcd_start_pmc = ucf_start_pmc;
447 pcd->pcd_stop_pmc = ucf_stop_pmc;
448 pcd->pcd_write_pmc = ucf_write_pmc;
449
450 md->pmd_npmc += npmc;
451 }
452
453 /*
454 * Intel programmable PMCs.
455 */
456
457 /*
458 * Event descriptor tables.
459 *
460 * For each event id, we track:
461 *
462 * 1. The CPUs that the event is valid for.
463 *
464 * 2. If the event uses a fixed UMASK, the value of the umask field.
465 * If the event doesn't use a fixed UMASK, a mask of legal bits
466 * to check against.
467 */
468
469 struct ucp_event_descr {
470 enum pmc_event ucp_ev;
471 unsigned char ucp_evcode;
472 unsigned char ucp_umask;
473 unsigned char ucp_flags;
474 };
475
476 #define UCP_F_I7 (1 << 0) /* CPU: Core i7 */
477 #define UCP_F_WM (1 << 1) /* CPU: Westmere */
478 #define UCP_F_SB (1 << 2) /* CPU: Sandy Bridge */
479 #define UCP_F_HW (1 << 3) /* CPU: Haswell */
480 #define UCP_F_FM (1 << 4) /* Fixed mask */
481
482 #define UCP_F_ALLCPUS \
483 (UCP_F_I7 | UCP_F_WM)
484
485 #define UCP_F_CMASK 0xFF000000
486
487 static pmc_value_t
ucp_perfctr_value_to_reload_count(pmc_value_t v)488 ucp_perfctr_value_to_reload_count(pmc_value_t v)
489 {
490 v &= (1ULL << uncore_ucp_width) - 1;
491 return (1ULL << uncore_ucp_width) - v;
492 }
493
494 static pmc_value_t
ucp_reload_count_to_perfctr_value(pmc_value_t rlc)495 ucp_reload_count_to_perfctr_value(pmc_value_t rlc)
496 {
497 return (1ULL << uncore_ucp_width) - rlc;
498 }
499
500 /*
501 * Counter specific event information for Sandybridge and Haswell
502 */
503 static int
ucp_event_sb_hw_ok_on_counter(uint8_t ev,int ri)504 ucp_event_sb_hw_ok_on_counter(uint8_t ev, int ri)
505 {
506 uint32_t mask;
507
508 switch (ev) {
509 /*
510 * Events valid only on counter 0.
511 */
512 case 0x80:
513 case 0x83:
514 mask = (1 << 0);
515 break;
516
517 default:
518 mask = ~0; /* Any row index is ok. */
519 }
520
521 return (mask & (1 << ri));
522 }
523
524 static int
ucp_allocate_pmc(int cpu,int ri,struct pmc * pm,const struct pmc_op_pmcallocate * a)525 ucp_allocate_pmc(int cpu, int ri, struct pmc *pm,
526 const struct pmc_op_pmcallocate *a)
527 {
528 uint8_t ev;
529 uint32_t caps;
530 const struct pmc_md_ucp_op_pmcallocate *ucp;
531
532 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
533 ("[uncore,%d] illegal CPU %d", __LINE__, cpu));
534 KASSERT(ri >= 0 && ri < uncore_ucp_npmc,
535 ("[uncore,%d] illegal row-index value %d", __LINE__, ri));
536
537 /* check requested capabilities */
538 caps = a->pm_caps;
539 if ((UCP_PMC_CAPS & caps) != caps)
540 return (EPERM);
541
542 ucp = &a->pm_md.pm_ucp;
543 ev = UCP_EVSEL(ucp->pm_ucp_config);
544 switch (uncore_cputype) {
545 case PMC_CPU_INTEL_HASWELL:
546 case PMC_CPU_INTEL_SANDYBRIDGE:
547 if (ucp_event_sb_hw_ok_on_counter(ev, ri) == 0)
548 return (EINVAL);
549 break;
550 default:
551 break;
552 }
553
554 pm->pm_md.pm_ucp.pm_ucp_evsel = ucp->pm_ucp_config | UCP_EN;
555
556 return (0);
557 }
558
559 static int
ucp_config_pmc(int cpu,int ri,struct pmc * pm)560 ucp_config_pmc(int cpu, int ri, struct pmc *pm)
561 {
562 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
563 ("[uncore,%d] illegal CPU %d", __LINE__, cpu));
564
565 KASSERT(ri >= 0 && ri < uncore_ucp_npmc,
566 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
567
568 PMCDBG3(MDP,CFG,1, "ucp-config cpu=%d ri=%d pm=%p", cpu, ri, pm);
569
570 KASSERT(uncore_pcpu[cpu] != NULL, ("[uncore,%d] null per-cpu %d", __LINE__,
571 cpu));
572
573 uncore_pcpu[cpu]->pc_uncorepmcs[ri].phw_pmc = pm;
574
575 return (0);
576 }
577
578 static int
ucp_describe(int cpu,int ri,struct pmc_info * pi,struct pmc ** ppmc)579 ucp_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
580 {
581 int error;
582 struct pmc_hw *phw;
583 char ucp_name[PMC_NAME_MAX];
584
585 phw = &uncore_pcpu[cpu]->pc_uncorepmcs[ri];
586
587 (void) snprintf(ucp_name, sizeof(ucp_name), "UCP-%d", ri);
588 if ((error = copystr(ucp_name, pi->pm_name, PMC_NAME_MAX,
589 NULL)) != 0)
590 return (error);
591
592 pi->pm_class = PMC_CLASS_UCP;
593
594 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
595 pi->pm_enabled = TRUE;
596 *ppmc = phw->phw_pmc;
597 } else {
598 pi->pm_enabled = FALSE;
599 *ppmc = NULL;
600 }
601
602 return (0);
603 }
604
605 static int
ucp_get_config(int cpu,int ri,struct pmc ** ppm)606 ucp_get_config(int cpu, int ri, struct pmc **ppm)
607 {
608 *ppm = uncore_pcpu[cpu]->pc_uncorepmcs[ri].phw_pmc;
609
610 return (0);
611 }
612
613 static int
ucp_read_pmc(int cpu,int ri,pmc_value_t * v)614 ucp_read_pmc(int cpu, int ri, pmc_value_t *v)
615 {
616 struct pmc *pm;
617 pmc_value_t tmp;
618
619 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
620 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu));
621 KASSERT(ri >= 0 && ri < uncore_ucp_npmc,
622 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
623
624 pm = uncore_pcpu[cpu]->pc_uncorepmcs[ri].phw_pmc;
625
626 KASSERT(pm,
627 ("[uncore,%d] cpu %d ri %d pmc not configured", __LINE__, cpu,
628 ri));
629
630 tmp = rdmsr(UCP_PMC0 + ri);
631 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
632 *v = ucp_perfctr_value_to_reload_count(tmp);
633 else
634 *v = tmp;
635
636 PMCDBG4(MDP,REA,1, "ucp-read cpu=%d ri=%d msr=0x%x -> v=%jx", cpu, ri,
637 ri, *v);
638
639 return (0);
640 }
641
642 static int
ucp_release_pmc(int cpu,int ri,struct pmc * pm)643 ucp_release_pmc(int cpu, int ri, struct pmc *pm)
644 {
645 (void) pm;
646
647 PMCDBG3(MDP,REL,1, "ucp-release cpu=%d ri=%d pm=%p", cpu, ri,
648 pm);
649
650 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
651 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu));
652 KASSERT(ri >= 0 && ri < uncore_ucp_npmc,
653 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
654
655 KASSERT(uncore_pcpu[cpu]->pc_uncorepmcs[ri].phw_pmc
656 == NULL, ("[uncore,%d] PHW pmc non-NULL", __LINE__));
657
658 return (0);
659 }
660
661 static int
ucp_start_pmc(int cpu,int ri)662 ucp_start_pmc(int cpu, int ri)
663 {
664 struct pmc *pm;
665 uint32_t evsel;
666 struct uncore_cpu *cc;
667
668 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
669 ("[uncore,%d] illegal CPU value %d", __LINE__, cpu));
670 KASSERT(ri >= 0 && ri < uncore_ucp_npmc,
671 ("[uncore,%d] illegal row-index %d", __LINE__, ri));
672
673 cc = uncore_pcpu[cpu];
674 pm = cc->pc_uncorepmcs[ri].phw_pmc;
675
676 KASSERT(pm,
677 ("[uncore,%d] starting cpu%d,ri%d with no pmc configured",
678 __LINE__, cpu, ri));
679
680 PMCDBG2(MDP,STA,1, "ucp-start cpu=%d ri=%d", cpu, ri);
681
682 evsel = pm->pm_md.pm_ucp.pm_ucp_evsel;
683
684 PMCDBG4(MDP,STA,2,
685 "ucp-start/2 cpu=%d ri=%d evselmsr=0x%x evsel=0x%x",
686 cpu, ri, SELECTSEL(uncore_cputype) + ri, evsel);
687
688 /* Event specific configuration. */
689 switch (pm->pm_event) {
690 case PMC_EV_UCP_EVENT_0CH_04H_E:
691 case PMC_EV_UCP_EVENT_0CH_08H_E:
692 wrmsr(MSR_GQ_SNOOP_MESF,0x2);
693 break;
694 case PMC_EV_UCP_EVENT_0CH_04H_F:
695 case PMC_EV_UCP_EVENT_0CH_08H_F:
696 wrmsr(MSR_GQ_SNOOP_MESF,0x8);
697 break;
698 case PMC_EV_UCP_EVENT_0CH_04H_M:
699 case PMC_EV_UCP_EVENT_0CH_08H_M:
700 wrmsr(MSR_GQ_SNOOP_MESF,0x1);
701 break;
702 case PMC_EV_UCP_EVENT_0CH_04H_S:
703 case PMC_EV_UCP_EVENT_0CH_08H_S:
704 wrmsr(MSR_GQ_SNOOP_MESF,0x4);
705 break;
706 default:
707 break;
708 }
709 wrmsr(SELECTSEL(uncore_cputype) + ri, evsel);
710
711 do {
712 cc->pc_resync = 0;
713 cc->pc_globalctrl |= (1ULL << ri);
714 wrmsr(UC_GLOBAL_CTRL, cc->pc_globalctrl);
715 } while (cc->pc_resync != 0);
716
717 return (0);
718 }
719
720 static int
ucp_stop_pmc(int cpu,int ri)721 ucp_stop_pmc(int cpu, int ri)
722 {
723 struct pmc *pm __diagused;
724 struct uncore_cpu *cc;
725
726 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
727 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu));
728 KASSERT(ri >= 0 && ri < uncore_ucp_npmc,
729 ("[uncore,%d] illegal row index %d", __LINE__, ri));
730
731 cc = uncore_pcpu[cpu];
732 pm = cc->pc_uncorepmcs[ri].phw_pmc;
733
734 KASSERT(pm,
735 ("[uncore,%d] cpu%d ri%d no configured PMC to stop", __LINE__,
736 cpu, ri));
737
738 PMCDBG2(MDP,STO,1, "ucp-stop cpu=%d ri=%d", cpu, ri);
739
740 /* stop hw. */
741 wrmsr(SELECTSEL(uncore_cputype) + ri, 0);
742
743 do {
744 cc->pc_resync = 0;
745 cc->pc_globalctrl &= ~(1ULL << ri);
746 wrmsr(UC_GLOBAL_CTRL, cc->pc_globalctrl);
747 } while (cc->pc_resync != 0);
748
749 return (0);
750 }
751
752 static int
ucp_write_pmc(int cpu,int ri,pmc_value_t v)753 ucp_write_pmc(int cpu, int ri, pmc_value_t v)
754 {
755 struct pmc *pm;
756 struct uncore_cpu *cc;
757
758 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
759 ("[uncore,%d] illegal cpu value %d", __LINE__, cpu));
760 KASSERT(ri >= 0 && ri < uncore_ucp_npmc,
761 ("[uncore,%d] illegal row index %d", __LINE__, ri));
762
763 cc = uncore_pcpu[cpu];
764 pm = cc->pc_uncorepmcs[ri].phw_pmc;
765
766 KASSERT(pm,
767 ("[uncore,%d] cpu%d ri%d no configured PMC to stop", __LINE__,
768 cpu, ri));
769
770 PMCDBG4(MDP,WRI,1, "ucp-write cpu=%d ri=%d msr=0x%x v=%jx", cpu, ri,
771 UCP_PMC0 + ri, v);
772
773 if (PMC_IS_SAMPLING_MODE(PMC_TO_MODE(pm)))
774 v = ucp_reload_count_to_perfctr_value(v);
775
776 /*
777 * Write the new value to the counter. The counter will be in
778 * a stopped state when the pcd_write() entry point is called.
779 */
780
781 wrmsr(UCP_PMC0 + ri, v);
782
783 return (0);
784 }
785
786
787 static void
ucp_initialize(struct pmc_mdep * md,int maxcpu,int npmc,int pmcwidth)788 ucp_initialize(struct pmc_mdep *md, int maxcpu, int npmc, int pmcwidth)
789 {
790 struct pmc_classdep *pcd;
791
792 KASSERT(md != NULL, ("[ucp,%d] md is NULL", __LINE__));
793
794 PMCDBG0(MDP,INI,1, "ucp-initialize");
795
796 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_UCP];
797
798 pcd->pcd_caps = UCP_PMC_CAPS;
799 pcd->pcd_class = PMC_CLASS_UCP;
800 pcd->pcd_num = npmc;
801 pcd->pcd_ri = md->pmd_npmc;
802 pcd->pcd_width = pmcwidth;
803
804 pcd->pcd_allocate_pmc = ucp_allocate_pmc;
805 pcd->pcd_config_pmc = ucp_config_pmc;
806 pcd->pcd_describe = ucp_describe;
807 pcd->pcd_get_config = ucp_get_config;
808 pcd->pcd_get_msr = NULL;
809 pcd->pcd_pcpu_fini = uncore_pcpu_fini;
810 pcd->pcd_pcpu_init = uncore_pcpu_init;
811 pcd->pcd_read_pmc = ucp_read_pmc;
812 pcd->pcd_release_pmc = ucp_release_pmc;
813 pcd->pcd_start_pmc = ucp_start_pmc;
814 pcd->pcd_stop_pmc = ucp_stop_pmc;
815 pcd->pcd_write_pmc = ucp_write_pmc;
816
817 md->pmd_npmc += npmc;
818 }
819
820 int
pmc_uncore_initialize(struct pmc_mdep * md,int maxcpu)821 pmc_uncore_initialize(struct pmc_mdep *md, int maxcpu)
822 {
823 uncore_cputype = md->pmd_cputype;
824 uncore_pmcmask = 0;
825
826 /*
827 * Initialize programmable counters.
828 */
829
830 uncore_ucp_npmc = 8;
831 uncore_ucp_width = 48;
832
833 uncore_pmcmask |= ((1ULL << uncore_ucp_npmc) - 1);
834
835 ucp_initialize(md, maxcpu, uncore_ucp_npmc, uncore_ucp_width);
836
837 /*
838 * Initialize fixed function counters, if present.
839 */
840 uncore_ucf_ri = uncore_ucp_npmc;
841 uncore_ucf_npmc = 1;
842 uncore_ucf_width = 48;
843
844 ucf_initialize(md, maxcpu, uncore_ucf_npmc, uncore_ucf_width);
845 uncore_pmcmask |= ((1ULL << uncore_ucf_npmc) - 1) << SELECTOFF(uncore_cputype);
846
847 PMCDBG2(MDP,INI,1,"uncore-init pmcmask=0x%jx ucfri=%d", uncore_pmcmask,
848 uncore_ucf_ri);
849
850 uncore_pcpu = malloc(sizeof(*uncore_pcpu) * maxcpu, M_PMC,
851 M_ZERO | M_WAITOK);
852
853 return (0);
854 }
855
856 void
pmc_uncore_finalize(struct pmc_mdep * md)857 pmc_uncore_finalize(struct pmc_mdep *md)
858 {
859 PMCDBG0(MDP,INI,1, "uncore-finalize");
860
861 free(uncore_pcpu, M_PMC);
862 uncore_pcpu = NULL;
863 }
864