Searched refs:shift_type (Results 1 – 3 of 3) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
| H A D | EmulateInstructionARM.h | 448 ARM_ShifterType shift_type); 452 ARM_ShifterType shift_type);
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| H A D | EmulateInstructionARM.cpp | 3749 ARM_ShifterType shift_type) { in EmulateShiftImm() argument 3768 if (shift_type == SRType_ROR && use_encoding == eEncodingT1) { in EmulateShiftImm() 3778 if (shift_type == SRType_ROR) in EmulateShiftImm() 3789 if (shift_type == SRType_RRX) in EmulateShiftImm() 3810 if (shift_type == SRType_ROR && imm5 == 0) in EmulateShiftImm() 3811 shift_type = SRType_RRX; in EmulateShiftImm() 3820 (shift_type == SRType_RRX ? 1 : DecodeImmShift(shift_type, imm5)); in EmulateShiftImm() 3822 uint32_t result = Shift_C(value, shift_type, amt, APSR_C, carry, &success); in EmulateShiftImm() 3839 ARM_ShifterType shift_type) { in EmulateShiftReg() argument 3893 uint32_t result = Shift_C(value, shift_type, amt, APSR_C, carry, &success); in EmulateShiftReg()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrFormats.td | 2136 class BaseShift<bits<2> shift_type, RegisterClass regtype, string asm, 2140 let Inst{11-10} = shift_type; 2143 multiclass Shift<bits<2> shift_type, string asm, SDNode OpNode> { 2144 def Wr : BaseShift<shift_type, GPR32, asm> { 2148 def Xr : BaseShift<shift_type, GPR64, asm, OpNode> {
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