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Searched refs:setDesc (Results 1 – 25 of 96) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyLowerBrUnless.cpp81 Def->setDesc(TII.get(NE_I32)); in runOnMachineFunction()
85 Def->setDesc(TII.get(EQ_I32)); in runOnMachineFunction()
89 Def->setDesc(TII.get(LE_S_I32)); in runOnMachineFunction()
93 Def->setDesc(TII.get(LT_S_I32)); in runOnMachineFunction()
97 Def->setDesc(TII.get(GE_S_I32)); in runOnMachineFunction()
121 Def->setDesc(TII.get(NE_I64)); in runOnMachineFunction()
125 Def->setDesc(TII.get(EQ_I64)); in runOnMachineFunction()
161 Def->setDesc(TII.get(NE_F32)); in runOnMachineFunction()
165 Def->setDesc(TII.get(EQ_F32)); in runOnMachineFunction()
169 Def->setDesc(TII.get(NE_F64)); in runOnMachineFunction()
[all …]
H A DWebAssemblyRegStackify.cpp108 MI->setDesc(TII->get(WebAssembly::CONST_I32)); in convertImplicitDefToConstZero()
111 MI->setDesc(TII->get(WebAssembly::CONST_I64)); in convertImplicitDefToConstZero()
114 MI->setDesc(TII->get(WebAssembly::CONST_F32)); in convertImplicitDefToConstZero()
119 MI->setDesc(TII->get(WebAssembly::CONST_F64)); in convertImplicitDefToConstZero()
124 MI->setDesc(TII->get(WebAssembly::CONST_V128_I64x2)); in convertImplicitDefToConstZero()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIOptimizeExecMasking.cpp179 MI.setDesc(TII.get(RegSrc ? AMDGPU::COPY : AMDGPU::S_MOV_B32)); in removeTerminatorBit()
184 MI.setDesc(TII.get(RegSrc ? AMDGPU::COPY : AMDGPU::S_MOV_B64)); in removeTerminatorBit()
190 MI.setDesc(TII.get(AMDGPU::S_XOR_B64)); in removeTerminatorBit()
196 MI.setDesc(TII.get(AMDGPU::S_XOR_B32)); in removeTerminatorBit()
202 MI.setDesc(TII.get(AMDGPU::S_OR_B64)); in removeTerminatorBit()
208 MI.setDesc(TII.get(AMDGPU::S_OR_B32)); in removeTerminatorBit()
214 MI.setDesc(TII.get(AMDGPU::S_ANDN2_B64)); in removeTerminatorBit()
220 MI.setDesc(TII.get(AMDGPU::S_ANDN2_B32)); in removeTerminatorBit()
226 MI.setDesc(TII.get(AMDGPU::S_AND_B64)); in removeTerminatorBit()
232 MI.setDesc(TII.get(AMDGPU::S_AND_B32)); in removeTerminatorBit()
H A DSIShrinkInstructions.cpp200 MI.setDesc(TII->get(SOPKOpc)); in shrinkScalarCompare()
210 MI.setDesc(NewDesc); in shrinkScalarCompare()
294 MI.setDesc(TII->get(NewOpcode)); in shrinkMIMG()
373 MI.setDesc(TII->get(Opc)); in shrinkScalarLogicOp()
632 MI.setDesc(TII->get(AMDGPU::V_BFREV_B32_e32)); in runOnMachineFunction()
677 MI.setDesc(TII->get(Opc)); in runOnMachineFunction()
697 MI.setDesc(TII->get(AMDGPU::S_MOVK_I32)); in runOnMachineFunction()
699 MI.setDesc(TII->get(AMDGPU::S_BREV_B32)); in runOnMachineFunction()
H A DSIFoldOperands.cpp293 MI->setDesc(TII.get(AMDGPU::IMPLICIT_DEF)); in updateOperand()
357 MI->setDesc(TII->get(NewOpc)); in tryAddToFoldList()
363 MI->setDesc(TII->get(Opc)); in tryAddToFoldList()
374 MI->setDesc(TII->get(ImmOpc)); in tryAddToFoldList()
673 UseMI->setDesc(TII->get(NewOpc)); in foldOperand()
729 UseMI->setDesc(TII->get(MovOp)); in foldOperand()
762 UseMI->setDesc(TII->get(AMDGPU::REG_SEQUENCE)); in foldOperand()
841 UseMI->setDesc(TII->get(AMDGPU::V_ACCVGPR_MOV_B32)); in foldOperand()
861 UseMI->setDesc(TII->get(AMDGPU::S_MOV_B32)); in foldOperand()
882 UseMI->setDesc(TII->get(AMDGPU::COPY)); in foldOperand()
[all …]
H A DSIPreEmitPeephole.cpp174 MI.setDesc(TII->get(AMDGPU::S_BRANCH)); in optimizeVccBranch()
202 MI.setDesc(TII->get(AMDGPU::S_BRANCH)); in optimizeVccBranch()
212 MI.setDesc( in optimizeVccBranch()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp256 MIB->setDesc(TII.get(ARM::VMOVDRR)); in selectMergeValues()
288 MIB->setDesc(TII.get(ARM::VMOVRRD)); in selectUnmergeValues()
677 MIB->setDesc(TII.get(Opc)); in selectGlobal()
715 MIB->setDesc(TII.get(Opc)); in selectGlobal()
807 MIB->setDesc(TII.get(ARM::MOVsr)); in selectShift()
902 I.setDesc(TII.get(NewOpc)); in select()
958 I.setDesc(TII.get(COPY)); in select()
984 I.setDesc(TII.get(ARM::MOVi)); in select()
1030 I.setDesc(TII.get(COPY)); in select()
1099 I.setDesc(TII.get(NewOpc)); in select()
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H A DThumb2InstrInfo.cpp543 MI.setDesc(TII.get(ARM::tMOVr)); in rewriteT2FrameIndex()
558 MI.setDesc(IsSP ? TII.get(ARM::t2SUBspImm) : TII.get(ARM::t2SUBri)); in rewriteT2FrameIndex()
560 MI.setDesc(IsSP ? TII.get(ARM::t2ADDspImm) : TII.get(ARM::t2ADDri)); in rewriteT2FrameIndex()
578 MI.setDesc(TII.get(NewOpc)); in rewriteT2FrameIndex()
697 MI.setDesc(TII.get(NewOpc)); in rewriteT2FrameIndex()
741 MI.setDesc(TII.get(positiveOffsetOpcode(NewOpc))); in rewriteT2FrameIndex()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZShortenInst.cpp95 MI.setDesc(TII->get(LLIxL)); in shortenIIF()
100 MI.setDesc(TII->get(LLIxH)); in shortenIIF()
111 MI.setDesc(TII->get(Opcode)); in shortenOn0()
122 MI.setDesc(TII->get(Opcode)); in shortenOn01()
135 MI.setDesc(TII->get(Opcode)); in shortenOn001()
168 MI.setDesc(TII->get(Opcode)); in shortenFPConv()
195 MI.setDesc(TII->get(Opcode)); in shortenFusedFPOp()
365 MI.setDesc(TII->get(TwoOperandOpcode)); in processBlock()
H A DSystemZPostRewrite.cpp95 MBBI->setDesc(TII->get(LowOpcode)); in selectLOCRMux()
97 MBBI->setDesc(TII->get(HighOpcode)); in selectLOCRMux()
146 MBBI->setDesc(TII->get(LowOpcode)); in selectSELRMux()
148 MBBI->setDesc(TII->get(HighOpcode)); in selectSELRMux()
223 MI.setDesc(TII->get(TargetMemOpcode)); in selectMI()
H A DSystemZInstrInfo.cpp111 EarlierMI->setDesc(get(HighOpcode)); in splitMove()
112 MI->setDesc(get(LowOpcode)); in splitMove()
127 MI->setDesc(get(NewOpcode)); in splitAdjDynAlloc()
159 MI.setDesc(get(LowOpcodeK)); in expandRIEPseudo()
181 MI.setDesc(get(Opcode)); in expandRXYPseudo()
191 MI.setDesc(get(Opcode)); in expandLOCPseudo()
236 MI->setDesc(get(SystemZ::LG)); in expandLoadStackGuard()
663 UseMI.setDesc(get(NewUseOpc)); in FoldImmediate()
727 MI.setDesc(get(SystemZ::CondTrap)); in PredicateInstruction()
745 MI.setDesc(get(SystemZ::CallBRCL)); in PredicateInstruction()
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H A DSystemZElimCompare.cpp229 Branch->setDesc(TII->get(BRCT)); in convertToBRCT()
272 Branch->setDesc(TII->get(LATOpcode)); in convertToLoadAndTrap()
332 MI.setDesc(TII->get(ConvOpc)); in convertToLogical()
671 Branch->setDesc(TII->get(FusedOpcode)); in fuseCompareOperations()
H A DSystemZLongBranch.cpp394 Branch->setDesc(TII->get(SystemZ::JG)); in relaxBranch()
397 Branch->setDesc(TII->get(SystemZ::BRCL)); in relaxBranch()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DExpandPostRAPseudos.cpp99 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
112 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerSubregToReg()
139 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
156 MI->setDesc(TII->get(TargetOpcode::KILL)); in LowerCopy()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp305 I.setDesc(TII.get(X86::COPY)); in selectCopy()
537 I.setDesc(TII.get(NewOpc)); in selectLoadStoreOp()
573 I.setDesc(TII.get(NewOpc)); in selectFrameIndexOrGep()
625 I.setDesc(TII.get(NewOpc)); in selectGlobalValue()
677 I.setDesc(TII.get(NewOpc)); in selectConstant()
702 I.setDesc(TII.get(X86::COPY)); in selectTurnIntoCOPY()
768 I.setDesc(TII.get(X86::COPY)); in selectTruncOrPtrToInt()
877 I.setDesc(TII.get(X86::COPY)); in selectAnyext()
1263 I.setDesc(TII.get(X86::VINSERTF128rr)); in selectInsert()
1466 I.setDesc(TII.get(X86::IMPLICIT_DEF)); in selectImplicitDefOrPHI()
[all …]
H A DX86ExpandPseudo.cpp554 MI.setDesc(TII->get(X86::LDTILECFG)); in ExpandMI()
563 MI.setDesc(TII->get(Opc)); in ExpandMI()
583 MI.setDesc(TII->get(Opc)); in ExpandMI()
590 MI.setDesc(TII->get(X86::TILESTORED)); in ExpandMI()
596 MI.setDesc(TII->get(X86::TILEZERO)); in ExpandMI()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CompressJumpTables.cpp147 MI.setDesc(TII->get(AArch64::JumpTableDest8)); in compressJumpTable()
153 MI.setDesc(TII->get(AArch64::JumpTableDest16)); in compressJumpTable()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DDelaySlotFiller.cpp188 slot->setDesc(Subtarget->getInstrInfo()->get(SP::RET)); in findDelayInstr()
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD()
430 OrMI->setDesc(TII->get((OrMI->getOpcode() == SP::ORrr) in combineRestoreOR()
467 RestoreMI->setDesc(TII->get(SP::RESTOREri)); in combineRestoreSETHIi()
H A DSparcRegisterInfo.cpp192 MI.setDesc(TII.get(SP::STDFri)); in eliminateFrameIndex()
205 MI.setDesc(TII.get(SP::LDDFri)); in eliminateFrameIndex()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCEarlyReturn.cpp94 MI->setDesc(TII->get(PPC::BCCLR)); in processBlock()
111 MI->setDesc( in processBlock()
H A DPPCInstrInfo.cpp2191 MI.setDesc(get(PPC::BCLR)); in PredicateInstruction()
2217 MI.setDesc(get(PPC::BC)); in PredicateInstruction()
2225 MI.setDesc(get(PPC::BCn)); in PredicateInstruction()
2233 MI.setDesc(get(PPC::BCC)); in PredicateInstruction()
2724 MI->setDesc(NewDesc); in optimizeCompareInstr()
2985 MI.setDesc(get(Opcode)); in expandVSXMemPseudo()
3071 MI.setDesc(get(PPC::LD)); in expandPostRAPseudo()
3082 MI.setDesc(get(PPC::STD)); in expandPostRAPseudo()
3091 MI.setDesc(get(PPC::LDX)); in expandPostRAPseudo()
3113 MI.setDesc(get(PPC::ISYNC)); in expandPostRAPseudo()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVERegisterInfo.cpp175 MI.setDesc(TII.get(VE::STrii)); in eliminateFrameIndex()
190 MI.setDesc(TII.get(VE::LDrii)); in eliminateFrameIndex()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp1022 I.setDesc(TII.get(AArch64::COPY)); in selectCopy()
2445 I.setDesc(TII.get(Opc)); in select()
2556 I.setDesc(TII.get(MovOpc)); in select()
2765 I.setDesc(TII.get(NewOpc)); in select()
2848 I.setDesc(TII.get(NewOpc)); in select()
2882 I.setDesc(TII.get(NewOpc)); in select()
3184 I.setDesc(TII.get(NewOpc)); in select()
3376 I.setDesc(TII.get(Opc)); in selectReduction()
3390 I.setDesc(TII.get(Opc)); in selectReduction()
3519 I.setDesc(TII.get(Opc)); in selectIntrinsicTrunc()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrInfo.cpp377 MIB->setDesc(get(Move)); in ExpandMOVX_RR()
453 MIB->setDesc(Desc); in ExpandMOVSZX_RM()
492 MIB->setDesc(get(M68k::MOV16cd)); in ExpandCCR()
495 MIB->setDesc(get(M68k::MOV16dc)); in ExpandCCR()
563 MIB->setDesc(Desc); in Expand2AddrUndef()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCSymbolMachO.h105 void setDesc(unsigned Value) const { in setDesc() function

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