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Searched refs:rtwn_bb_setbits (Results 1 – 17 of 17) sorted by relevance

/freebsd-13.1/sys/dev/rtwn/rtl8821a/
H A Dr21a_chan.c66 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x00100000, 0); in r21a_bypass_ext_lna_2ghz()
68 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 0, 0x07); in r21a_bypass_ext_lna_2ghz()
69 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 0, 0x0700); in r21a_bypass_ext_lna_2ghz()
78 rtwn_bb_setbits(sc, R12A_OFDMCCK_EN, in r21a_set_band_2ghz()
82 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), in r21a_set_band_2ghz()
84 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), in r21a_set_band_2ghz()
99 rtwn_bb_setbits(sc, R12A_TX_SCALE(0), 0x0f00, 0); in r21a_set_band_2ghz()
101 rtwn_bb_setbits(sc, R12A_TX_PATH, 0xf0, 0x10); in r21a_set_band_2ghz()
116 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), in r21a_set_band_5ghz()
118 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), in r21a_set_band_5ghz()
[all …]
H A Dr21a_calib.c110 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0, 0x80000000); in r21a_iq_calib_sw()
/freebsd-13.1/sys/dev/rtwn/rtl8812a/
H A Dr12a_chan.c278 rtwn_bb_setbits(sc, R12A_RFMOD, 0, 0xc00); in r12a_fix_spur()
281 rtwn_bb_setbits(sc, R12A_RFMOD, 0x400, 0x800); in r12a_fix_spur()
285 rtwn_bb_setbits(sc, R12A_RFMOD, 0, 0x300); in r12a_fix_spur()
286 rtwn_bb_setbits(sc, R12A_ADC_BUF_CLK, in r12a_fix_spur()
289 rtwn_bb_setbits(sc, R12A_RFMOD, 0x100, 0x200); in r12a_fix_spur()
290 rtwn_bb_setbits(sc, R12A_ADC_BUF_CLK, in r12a_fix_spur()
298 rtwn_bb_setbits(sc, R12A_RFMOD, 0, 0x300); in r12a_fix_spur()
300 rtwn_bb_setbits(sc, R12A_RFMOD, 0x100, 0x200); in r12a_fix_spur()
478 rtwn_bb_setbits(sc, R12A_OFDMCCK_EN, in r12a_set_band_2ghz()
519 rtwn_bb_setbits(sc, R12A_TX_PATH, 0xf0, 0x10); in r12a_set_band_2ghz()
[all …]
H A Dr12a_calib.c135 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0); in r12a_save_bb_afe_vals()
148 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0); in r12a_restore_bb_afe_vals()
161 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0); in r12a_save_rf_vals()
175 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0); in r12a_restore_rf_vals()
203 rtwn_bb_setbits(sc, R12A_CCA_ON_SEC, 0x03, 0x0c); in r12a_iq_config_mac()
254 rtwn_bb_setbits(sc, 0xc90, 0, 0x00000080); in r12a_iq_calib_sw()
255 rtwn_bb_setbits(sc, 0xcc4, 0, 0x20040000); in r12a_iq_calib_sw()
256 rtwn_bb_setbits(sc, 0xcc8, 0, 0x20000000); in r12a_iq_calib_sw()
263 rtwn_bb_setbits(sc, 0xe90, 0, 0x00000080); in r12a_iq_calib_sw()
264 rtwn_bb_setbits(sc, 0xec4, 0, 0x20040000); in r12a_iq_calib_sw()
[all …]
H A Dr12a_rf.c66 rtwn_bb_setbits(sc, R12A_CCA_ON_SEC, 0, 0x08); in r12a_rf_read()
71 rtwn_bb_setbits(sc, R12A_HSSI_PARAM2, in r12a_rf_read()
79 rtwn_bb_setbits(sc, R12A_CCA_ON_SEC, 0x08, 0); in r12a_rf_read()
92 rtwn_bb_setbits(sc, R12A_HSSI_PARAM2, in r12a_c_cut_rf_read()
H A Dr12a_init.c482 rtwn_bb_setbits(sc, R92C_FPGA0_RFPARAM(0), 0, 0x2000); in r12a_init_antsel()
/freebsd-13.1/sys/dev/rtwn/rtl8192c/
H A Dr92c_init.c153 rtwn_bb_setbits(sc, R92C_FPGA0_TXINFO, 0x03, 0x02); in r92c_init_bb_common()
160 rtwn_bb_setbits(sc, 0xe74, 0x0c000000, 0x08000000); in r92c_init_bb_common()
161 rtwn_bb_setbits(sc, 0xe78, 0x0c000000, 0x08000000); in r92c_init_bb_common()
162 rtwn_bb_setbits(sc, 0xe7c, 0x0c000000, 0x08000000); in r92c_init_bb_common()
163 rtwn_bb_setbits(sc, 0xe80, 0x0c000000, 0x08000000); in r92c_init_bb_common()
164 rtwn_bb_setbits(sc, 0xe88, 0x0c000000, 0x08000000); in r92c_init_bb_common()
249 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(chain), in r92c_init_rf()
253 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(chain), in r92c_init_rf()
257 rtwn_bb_setbits(sc, R92C_HSSI_PARAM2(chain), in r92c_init_rf()
260 rtwn_bb_setbits(sc, R92C_HSSI_PARAM2(chain), in r92c_init_rf()
[all …]
H A Dr92c_chan.c254 rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, 0, R92C_RFMOD_40MHZ); in r92c_set_bw40()
255 rtwn_bb_setbits(sc, R92C_FPGA1_RFMOD, 0, R92C_RFMOD_40MHZ); in r92c_set_bw40()
258 rtwn_bb_setbits(sc, R92C_CCK0_SYSTEM, 0x10, in r92c_set_bw40()
261 rtwn_bb_setbits(sc, R92C_OFDM1_LSTF, 0x0c00, in r92c_set_bw40()
264 rtwn_bb_setbits(sc, R92C_FPGA0_ANAPARAM2, in r92c_set_bw40()
267 rtwn_bb_setbits(sc, 0x818, 0x0c000000, (prichlo ? 2 : 1) << 26); in r92c_set_bw40()
281 rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, R92C_RFMOD_40MHZ, 0); in r92c_set_bw20()
282 rtwn_bb_setbits(sc, R92C_FPGA1_RFMOD, R92C_RFMOD_40MHZ, 0); in r92c_set_bw20()
284 rtwn_bb_setbits(sc, R92C_FPGA0_ANAPARAM2, 0, in r92c_set_bw20()
318 rtwn_bb_setbits(sc, R92C_OFDM0_AGCCORE1(0), in r92c_set_gain()
[all …]
H A Dr92c_calib.c193 rtwn_bb_setbits(sc, R92C_CCK0_AFESETTING, 0, 0x0f000000); in r92c_iq_calib_run()
197 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACESW(0), 0, 0x04000400); in r92c_iq_calib_run()
198 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(0), 0x400, 0); in r92c_iq_calib_run()
199 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(1), 0x400, 0); in r92c_iq_calib_run()
348 rtwn_bb_setbits(sc, R92C_OFDM0_ECCATHRESHOLD, 0x80000000, in r92c_iq_calib_write_results()
355 rtwn_bb_setbits(sc, R92C_OFDM0_TXAFE(chain), 0xf0000000, in r92c_iq_calib_write_results()
359 rtwn_bb_setbits(sc, R92C_OFDM0_ECCATHRESHOLD, 0x20000000, in r92c_iq_calib_write_results()
365 rtwn_bb_setbits(sc, R92C_OFDM0_RXIQIMBALANCE(chain), 0x3ff, in r92c_iq_calib_write_results()
367 rtwn_bb_setbits(sc, R92C_OFDM0_RXIQIMBALANCE(chain), 0xfc00, in r92c_iq_calib_write_results()
371 rtwn_bb_setbits(sc, R92C_OFDM0_RXIQEXTANTA, 0xf0000000, in r92c_iq_calib_write_results()
[all …]
/freebsd-13.1/sys/dev/rtwn/rtl8192e/
H A Dr92e_chan.c172 rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, 0, R92C_RFMOD_40MHZ); in r92e_set_bw40()
173 rtwn_bb_setbits(sc, R92C_FPGA1_RFMOD, 0, R92C_RFMOD_40MHZ); in r92e_set_bw40()
181 rtwn_bb_setbits(sc, R92C_CCK0_SYSTEM, in r92e_set_bw40()
184 rtwn_bb_setbits(sc, R92C_OFDM1_LSTF, 0x0c00, (prichlo ? 1 : 2) << 10); in r92e_set_bw40()
186 rtwn_bb_setbits(sc, R92C_FPGA0_ANAPARAM2, in r92e_set_bw40()
189 rtwn_bb_setbits(sc, 0x818, 0x0c000000, (prichlo ? 2 : 1) << 26); in r92e_set_bw40()
200 rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, R92C_RFMOD_40MHZ, 0); in r92e_set_bw20()
201 rtwn_bb_setbits(sc, R92C_FPGA1_RFMOD, R92C_RFMOD_40MHZ, 0); in r92e_set_bw20()
208 rtwn_bb_setbits(sc, R92C_OFDM0_TXPSEUDONOISEWGT, 0xc0000000, 0); in r92e_set_bw20()
H A Dr92e_rf.c69 rtwn_bb_setbits(sc, R92C_HSSI_PARAM2(0), R92C_HSSI_PARAM2_READ_EDGE, 0); in r92e_rf_read()
70 rtwn_bb_setbits(sc, R92C_HSSI_PARAM2(0), 0, R92C_HSSI_PARAM2_READ_EDGE); in r92e_rf_read()
84 rtwn_bb_setbits(sc, 0x818, 0x20000, 0); in r92e_rf_write()
87 rtwn_bb_setbits(sc, 0x818, 0, 0x20000); in r92e_rf_write()
H A Dr92e_init.c180 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(chain), in r92e_init_rf()
184 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(chain), in r92e_init_rf()
188 rtwn_bb_setbits(sc, R92C_HSSI_PARAM2(chain), in r92e_init_rf()
191 rtwn_bb_setbits(sc, R92C_HSSI_PARAM2(chain), in r92e_init_rf()
203 rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, 0, R92C_RFMOD_CCK_EN); in r92e_init_rf()
204 rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, 0, R92C_RFMOD_OFDM_EN); in r92e_init_rf()
/freebsd-13.1/sys/dev/rtwn/rtl8188e/
H A Dr88e_calib.c210 rtwn_bb_setbits(sc, R92C_CCK0_AFESETTING, 0, 0x0f000000); in r88e_iq_calib_run()
214 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACESW(0), 0, 0x04000400); in r88e_iq_calib_run()
215 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(0), 0x400, 0); in r88e_iq_calib_run()
216 rtwn_bb_setbits(sc, R92C_FPGA0_RFIFACEOE(1), 0x400, 0); in r88e_iq_calib_run()
327 rtwn_bb_setbits(sc, R92C_OFDM0_ECCATHRESHOLD, 0x80000000, in r88e_iq_calib_write_results()
334 rtwn_bb_setbits(sc, R92C_OFDM0_TXAFE(0), 0xf0000000, in r88e_iq_calib_write_results()
336 rtwn_bb_setbits(sc, R92C_OFDM0_TXIQIMBALANCE(0), 0x003f0000, in r88e_iq_calib_write_results()
338 rtwn_bb_setbits(sc, R92C_OFDM0_ECCATHRESHOLD, 0x20000000, in r88e_iq_calib_write_results()
344 rtwn_bb_setbits(sc, R92C_OFDM0_RXIQIMBALANCE(0), 0x3ff, in r88e_iq_calib_write_results()
346 rtwn_bb_setbits(sc, R92C_OFDM0_RXIQIMBALANCE(0), 0xfc00, in r88e_iq_calib_write_results()
[all …]
H A Dr88e_chan.c138 rtwn_bb_setbits(sc, R92C_FPGA0_RFMOD, R92C_RFMOD_40MHZ, 0); in r88e_set_bw20()
139 rtwn_bb_setbits(sc, R92C_FPGA1_RFMOD, R92C_RFMOD_40MHZ, 0); in r88e_set_bw20()
150 rtwn_bb_setbits(sc, R92C_OFDM0_AGCCORE1(0), in r88e_set_gain()
/freebsd-13.1/sys/dev/rtwn/rtl8192c/pci/
H A Dr92ce_calib.c328 rtwn_bb_setbits(sc, R92C_OFDM0_TXIQIMBALANCE(chain), 0x3ff, reg); in r92ce_iq_calib_write_results()
329 rtwn_bb_setbits(sc, R92C_OFDM0_ECCATHRESHOLD, 0x80000000, in r92ce_iq_calib_write_results()
336 rtwn_bb_setbits(sc, R92C_OFDM0_TXAFE(chain), 0xf0000000, in r92ce_iq_calib_write_results()
338 rtwn_bb_setbits(sc, R92C_OFDM0_TXIQIMBALANCE(chain), 0x003f0000, in r92ce_iq_calib_write_results()
340 rtwn_bb_setbits(sc, R92C_OFDM0_ECCATHRESHOLD, 0x20000000, in r92ce_iq_calib_write_results()
346 rtwn_bb_setbits(sc, R92C_OFDM0_RXIQIMBALANCE(chain), 0x3ff, in r92ce_iq_calib_write_results()
348 rtwn_bb_setbits(sc, R92C_OFDM0_RXIQIMBALANCE(chain), 0xfc00, in r92ce_iq_calib_write_results()
352 rtwn_bb_setbits(sc, R92C_OFDM0_RXIQEXTANTA, 0xf0000000, in r92ce_iq_calib_write_results()
355 rtwn_bb_setbits(sc, R92C_OFDM0_AGCRSSITABLE, 0xf000, in r92ce_iq_calib_write_results()
/freebsd-13.1/sys/dev/rtwn/rtl8821a/usb/
H A Dr21au_dfs.c68 rtwn_bb_setbits(sc, 0x924, 0x00008000, 0); in r21au_dfs_radar_disable()
82 error = rtwn_bb_setbits(sc, 0x924, 0x00008000, 0); in r21au_dfs_radar_reset()
86 return (rtwn_bb_setbits(sc, 0x924, 0, 0x00008000)); in r21au_dfs_radar_reset()
99 RTWN_CHK(rtwn_bb_setbits(sc, 0x814, 0x3fffffff, 0x04cc4d10)); in r21au_dfs_radar_enable()
100 RTWN_CHK(rtwn_bb_setbits(sc, R12A_BW_INDICATION, 0xff, 0x06)); in r21au_dfs_radar_enable()
/freebsd-13.1/sys/dev/rtwn/
H A Dif_rtwnvar.h473 #define rtwn_bb_setbits rtwn_setbits_4 macro