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Searched refs:regsOverlap (Results 1 – 25 of 38) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallingConv.cpp167 if (TRI->regsOverlap(Reg, X86::XMM4) || in CC_X86_64_VectorCall()
168 TRI->regsOverlap(Reg, X86::XMM5)) in CC_X86_64_VectorCall()
H A DX86FixupLEAs.cpp446 if (TRI->regsOverlap(DestReg, Opnd.getReg())) in searchALUInst()
475 if (TRI->regsOverlap(Reg, AluDestReg)) in checkRegUsage()
477 if (TRI->regsOverlap(Reg, BaseReg)) { in checkRegUsage()
483 if (TRI->regsOverlap(Reg, IndexReg)) { in checkRegUsage()
H A DX86CallFrameOptimization.cpp341 if (RegInfo.regsOverlap(Reg, RegInfo.getStackRegister())) in classifyInstruction()
345 if (RegInfo.regsOverlap(Reg, U)) in classifyInstruction()
H A DX86FixupBWInsts.cpp276 TRI->regsOverlap(SuperDestReg, MO.getReg())) in getSuperRegDestIfDead()
H A DX86LoadValueInjectionLoadHardening.cpp791 TRI->regsOverlap(BaseMO.getReg(), Reg)) || in instrUsesRegToAccessMemory()
793 TRI->regsOverlap(IndexMO.getReg(), Reg)); in instrUsesRegToAccessMemory()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNHazardRecognizer.cpp778 TRI->regsOverlap(MI.getOperand(DataIdx).getReg(), Reg); in checkVALUHazardsHelper()
1296 return TRI.regsOverlap(DstReg, Reg); in checkMAIHazards908()
1338 return TRI.regsOverlap(Reg, DstReg); in checkMAIHazards908()
1373 return TRI.regsOverlap(Reg, DstReg); in checkMAIHazards908()
1458 return TRI.regsOverlap(DstReg, Reg); in checkMAIHazards90A()
1628 if (!IsMFMAFn(MI) || !TRI.regsOverlap(MI.getOperand(0).getReg(), Reg)) in checkMAIVALUHazards()
1639 !TRI.regsOverlap(MI.getOperand(0).getReg(), Reg)) in checkMAIVALUHazards()
1796 if (!SrcC->isReg() || !TRI.regsOverlap(SrcC->getReg(), Reg)) in checkMAIVALUHazards()
H A DSIPostRABundler.cpp84 if (TRI->regsOverlap(Reg, Def)) in isDependentLoad()
H A DSIShrinkInstructions.cpp401 if (TRI.regsOverlap(Reg, MO.getReg())) in instAccessReg()
588 if (Op.isKill() && TRI.regsOverlap(X, Op.getReg())) in matchSwap()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineCopyPropagation.cpp457 MIUse.isUse() && TRI->regsOverlap(Use.getReg(), MIUse.getReg())) in hasImplicitOverlap()
471 TRI->regsOverlap(Def, MIDef.getReg())) in hasOverlappingMultipleDef()
579 if (MI->isCopy() && !TRI->regsOverlap(MI->getOperand(0).getReg(), in ForwardCopyPropagateBlock()
837 !TRI->regsOverlap(MI->getOperand(0).getReg(), in BackwardCopyPropagateBlock()
H A DProcessImplicitDefs.cpp106 !TRI->regsOverlap(Reg, UserReg)) in processImplicitDef()
H A DCriticalAntiDepBreaker.cpp428 if (TRI->regsOverlap(NewReg, R)) { in findSuitableFreeRegister()
622 if (MO.isUse() && TRI->regsOverlap(AntiDepReg, Reg)) { in BreakAntiDependencies()
H A DMachineInstrBundle.cpp329 if (!TRI->regsOverlap(MOReg, Reg)) in AnalyzePhysRegInBundle()
H A DRegAllocPBQP.cpp418 if (TRI.regsOverlap(PRegN, PRegM)) { in createInterferenceEdge()
585 if (TRI.regsOverlap(Reg, CSR[i])) in isACalleeSavedRegister()
H A DMachineInstr.cpp1001 if (MOReg == Reg || (TRI && Reg && MOReg && TRI->regsOverlap(MOReg, Reg))) in findRegisterUseOperandIdx()
1056 Found = TRI->regsOverlap(MOReg, Reg); in findRegisterDefOperandIdx()
1952 if ((RegInfo && RegInfo->regsOverlap(Reg, OpReg)) || Reg == OpReg) in clearRegisterKills()
2058 [&](MCRegister Use) { return TRI.regsOverlap(Use, Reg); })) in setPhysRegsDeadExcept()
H A DImplicitNullChecks.cpp295 if (TRI->regsOverlap(RegA, RegB) && (MOA.isDef() || MOB.isDef())) in canReorder()
H A DVirtRegMap.cpp467 if (TRI->regsOverlap(Dst->getOperand(0).getReg(), in expandCopyBundle()
H A DTwoAddressInstructionPass.cpp422 return TRI->regsOverlap(RegA, RegB); in regsAreCompatible()
429 if (TRI->regsOverlap(R, Reg)) in regOverlapsSet()
H A DMachineBasicBlock.cpp1513 if (TRI->regsOverlap(LI.PhysReg, Reg)) in computeRegisterLiveness()
1572 if (TRI->regsOverlap(LI.PhysReg, Reg)) in computeRegisterLiveness()
H A DMachineCSE.cpp240 if (!TRI->regsOverlap(MO.getReg(), Reg)) in isPhysDefTriviallyDead()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64LoadStoreOptimizer.cpp824 TRI->regsOverlap(MOP.getReg(), DefReg); in forAllMIsUntilDef()
892 TRI->regsOverlap(MOP.getReg(), RegToRename)) { in mergePairedInsns()
903 TRI->regsOverlap(MOP.getReg(), RegToRename)) { in mergePairedInsns()
926 !TRI->regsOverlap(MOP.getReg(), *RenameReg); in mergePairedInsns()
1368 TRI->regsOverlap(RegToRename, MOP.getReg()); in canRenameUpToDef()
1433 !TRI->regsOverlap(MOP.getReg(), RegToRename)) in canRenameUpToDef()
1446 !TRI->regsOverlap(MOP.getReg(), RegToRename)) in canRenameUpToDef()
H A DAArch64PBQPRegAlloc.cpp196 if (livesOverlap && TRI->regsOverlap(pRd, pRa)) in addIntraChainConstraint()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.cpp108 if (regsOverlap(Reg, TRC.getRegister(i))) { in getRegisterOrder()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h416 bool regsOverlap(Register regA, Register regB) const { in regsOverlap() function
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZElimCompare.cpp151 if (TRI->regsOverlap(MOReg, Reg)) { in getRegReferences()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp1838 if (isLd && TRI->regsOverlap(EvenReg, BaseReg)) { in FixInvalidRegPairOp()
1839 assert(!TRI->regsOverlap(OddReg, BaseReg)); in FixInvalidRegPairOp()
1923 if (TRI->regsOverlap(Reg, E.MI->getOperand(0).getReg())) { in LoadStoreMultipleOpti()
2242 if (MO.isDef() && TRI->regsOverlap(Reg, Base)) in IsSafeAndProfitableToMove()

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