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Searched refs:reg_addr (Results 1 – 25 of 55) sorted by relevance

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/freebsd-13.1/sys/contrib/octeon-sdk/
H A Dcvmx-ixf18201.c85 uint16_t cvmx_ixf18201_read16(uint16_t reg_addr) in cvmx_ixf18201_read16() argument
87 cvmx_write64_uint16(IXF_ADDR_16, reg_addr); in cvmx_ixf18201_read16()
95 void cvmx_ixf18201_write16(uint16_t reg_addr, uint16_t data) in cvmx_ixf18201_write16() argument
97 cvmx_write64_uint16(IXF_ADDR_16, reg_addr); in cvmx_ixf18201_write16()
105 uint32_t cvmx_ixf18201_read32(uint16_t reg_addr) in cvmx_ixf18201_read32() argument
109 if (reg_addr & 0x1) in cvmx_ixf18201_read32()
113 lo = cvmx_ixf18201_read16(reg_addr); in cvmx_ixf18201_read32()
114 hi = cvmx_ixf18201_read16(reg_addr + 1); in cvmx_ixf18201_read32()
121 if (reg_addr & 0x1) in cvmx_ixf18201_write32()
127 cvmx_ixf18201_write16(reg_addr, lo); in cvmx_ixf18201_write32()
[all …]
H A Dcvmx-ixf18201.h63 uint16_t cvmx_ixf18201_read16(uint16_t reg_addr);
71 void cvmx_ixf18201_write16(uint16_t reg_addr, uint16_t data);
79 uint32_t cvmx_ixf18201_read32(uint16_t reg_addr);
87 void cvmx_ixf18201_write32(uint16_t reg_addr, uint32_t data);
/freebsd-13.1/sys/dev/iicbus/gpio/
H A Dtca6416.c278 uint8_t reg_addr, reg_bit, val; in tca6416_pin_getflags() local
285 reg_addr = TCA6416_REG_ADDR(pin, CONF_REG); in tca6416_pin_getflags()
288 error = tca6416_read(dev, reg_addr, &val); in tca6416_pin_getflags()
297 error = tca6416_read(dev, reg_addr, &val); in tca6416_pin_getflags()
319 reg_addr = TCA6416_REG_ADDR(pin, CONF_REG); in tca6416_pin_setflags()
325 error = tca6416_read(dev, reg_addr, &val); in tca6416_pin_setflags()
342 error = tca6416_write(dev, reg_addr, val); in tca6416_pin_setflags()
369 uint8_t reg_bit, reg_addr, reg_pvalue; in tca6416_pin_get() local
378 reg_addr = TCA6416_REG_ADDR(pin, IN_PORT_REG); in tca6416_pin_get()
395 uint8_t reg_addr, reg_bit, reg_value; in tca6416_pin_set() local
[all …]
/freebsd-13.1/sys/dev/bxe/
H A Dbxe_dump.h59 struct reg_addr { struct
80 static const struct reg_addr page_read_regs_e2[] = { argument
89 static const struct reg_addr page_read_regs_e3[] = {
93 static const struct reg_addr reg_addrs[] = {
1914 static const struct reg_addr idle_reg_addrs[] = {
H A Decore_init.h258 uint32_t reg_addr, reg_bit_map, vnic; in ecore_map_q_cos() local
279 reg_addr = ECORE_VOQ_Q_REG_ADDR(curr_cos, pf_q_num); in ecore_map_q_cos()
280 reg_bit_map = REG_RD(sc, reg_addr); in ecore_map_q_cos()
281 REG_WR(sc, reg_addr, reg_bit_map & (~q_bit_map)); in ecore_map_q_cos()
284 reg_addr = ECORE_VOQ_Q_REG_ADDR(new_cos, pf_q_num); in ecore_map_q_cos()
285 reg_bit_map = REG_RD(sc, reg_addr); in ecore_map_q_cos()
286 REG_WR(sc, reg_addr, reg_bit_map | q_bit_map); in ecore_map_q_cos()
291 reg_addr = ECORE_Q_CMDQ_REG_ADDR(pf_q_num); in ecore_map_q_cos()
292 reg_bit_map = REG_RD(sc, reg_addr); in ecore_map_q_cos()
297 REG_WR(sc, reg_addr, reg_bit_map); in ecore_map_q_cos()
/freebsd-13.1/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_kr.c215 uint16_t reg_addr; in al_eth_an_lt_reg_read() local
222 al_reg_write32(&adapter->mac_regs_base->kr.an_addr, reg_addr); in al_eth_an_lt_reg_read()
238 reg_addr); in al_eth_an_lt_reg_read()
248 reg_addr); in al_eth_an_lt_reg_read()
258 reg_addr); in al_eth_an_lt_reg_read()
268 reg_addr); in al_eth_an_lt_reg_read()
294 uint16_t reg_addr; in al_eth_an_lt_reg_write() local
315 reg_addr); in al_eth_an_lt_reg_write()
326 reg_addr); in al_eth_an_lt_reg_write()
337 reg_addr); in al_eth_an_lt_reg_write()
[all …]
/freebsd-13.1/sys/dev/ixgbe/
H A Dixgbe_x550.h65 s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
67 s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,
73 s32 ixgbe_write_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
75 s32 ixgbe_read_iosf_sb_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
105 s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
107 s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,
H A Dixgbe_phy.h165 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
167 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
169 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
171 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
H A Dixgbe_api.h71 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
73 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
215 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
217 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
H A Dixgbe_api.c560 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg() argument
566 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, in ixgbe_read_phy_reg()
579 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_write_phy_reg() argument
585 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, in ixgbe_write_phy_reg()
1293 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_iosf_sb_reg() argument
1296 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr, in ixgbe_read_iosf_sb_reg()
1309 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_iosf_sb_reg() argument
1312 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr, in ixgbe_write_iosf_sb_reg()
H A Dixgbe_phy.c599 s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, in ixgbe_read_phy_reg_mdi() argument
605 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
636 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
681 s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_read_phy_reg_generic() argument
692 status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data); in ixgbe_read_phy_reg_generic()
707 s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_mdi() argument
716 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
745 command = ((reg_addr << IXGBE_MSCA_NP_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
781 s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr, in ixgbe_write_phy_reg_generic() argument
790 status = hw->phy.ops.write_reg_mdi(hw, reg_addr, device_type, in ixgbe_write_phy_reg_generic()
/freebsd-13.1/sys/contrib/alpine-hal/
H A Dal_hal_udma_main.c109 uint32_t *reg_addr; in al_udma_q_config() local
113 reg_addr = &udma_q->q_regs->m2s_q.rlimit.mask; in al_udma_q_config()
115 val = al_reg_read32(reg_addr); in al_udma_q_config()
118 al_reg_write32(reg_addr, val); in al_udma_q_config()
132 uint32_t *reg_addr; in al_udma_q_config_compl() local
136 reg_addr = &udma_q->q_regs->m2s_q.comp_cfg; in al_udma_q_config_compl()
138 reg_addr = &udma_q->q_regs->s2m_q.comp_cfg; in al_udma_q_config_compl()
140 val = al_reg_read32(reg_addr); in al_udma_q_config_compl()
152 al_reg_write32(reg_addr, val); in al_udma_q_config_compl()
/freebsd-13.1/sys/arm/arm/
H A Ddebug_monitor.c552 uint32_t reg_addr, reg_ctrl; in dbg_find_slot() local
558 reg_addr = DBG_REG_BASE_BVR; in dbg_find_slot()
563 reg_addr = DBG_REG_BASE_WVR; in dbg_find_slot()
626 uint32_t reg_ctrl, reg_addr, ctrl, addr; in dbg_setup_xpoint() local
685 reg_addr = DBG_REG_BASE_BVR; in dbg_setup_xpoint()
706 reg_addr = DBG_REG_BASE_WVR; in dbg_setup_xpoint()
712 dbg_wb_write_reg(reg_addr, i, addr); in dbg_setup_xpoint()
743 uint32_t reg_ctrl, reg_addr, addr; in dbg_remove_xpoint() local
757 reg_addr = DBG_REG_BASE_BVR; in dbg_remove_xpoint()
765 reg_addr = DBG_REG_BASE_WVR; in dbg_remove_xpoint()
[all …]
/freebsd-13.1/sys/dev/al_eth/
H A Dal_init_eth_lm.h176 uint8_t reg_addr, uint8_t *val);
178 uint8_t reg_addr, uint8_t val);
254 uint8_t reg_addr, uint8_t *val);
256 uint8_t reg_addr, uint8_t val);
/freebsd-13.1/sys/dev/smartpqi/
H A Dsmartpqi_helper.c101 uint32_t *reg_addr __unused; in pqisrc_configure_legacy_intx()
106 reg_addr = &softs->pqi_reg->legacy_intr_mask_clr; in pqisrc_configure_legacy_intx()
108 reg_addr = &softs->pqi_reg->legacy_intr_mask_set; in pqisrc_configure_legacy_intx()
110 intx_mask = PCI_MEM_GET32(softs, reg_addr, PQI_LEGACY_INTR_MASK_CLR); in pqisrc_configure_legacy_intx()
112 PCI_MEM_PUT32(softs, reg_addr, PQI_LEGACY_INTR_MASK_CLR ,intx_mask); in pqisrc_configure_legacy_intx()
/freebsd-13.1/sys/dev/qlnx/qlnxe/
H A Dbcm_osal.h69 extern uint32_t qlnx_direct_reg_rd32(void *p_hwfn, uint32_t *reg_addr);
70 extern void qlnx_direct_reg_wr32(void *p_hwfn, void *reg_addr, uint32_t value);
71 extern void qlnx_direct_reg_wr64(void *p_hwfn, void *reg_addr, uint64_t value);
73 extern uint32_t qlnx_reg_rd32(void *p_hwfn, uint32_t reg_addr);
74 extern void qlnx_reg_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value);
75 extern void qlnx_reg_wr16(void *p_hwfn, uint32_t reg_addr, uint16_t value);
77 extern void qlnx_dbell_wr32(void *p_hwfn, uint32_t reg_addr, uint32_t value);
78 extern void qlnx_dbell_wr32_db(void *p_hwfn, void *reg_addr, uint32_t value);
/freebsd-13.1/sys/dev/cxgb/common/
H A Dcxgb_common.h151 int reg_addr, unsigned int *val);
153 int reg_addr, unsigned int val);
586 int reg_addr, unsigned int *val);
588 int reg_addr, unsigned int val);
628 #define XGM_REG(reg_addr, idx) \ argument
629 ((reg_addr) + (idx) * (XGMAC0_1_BASE_ADDR - XGMAC0_0_BASE_ADDR))
632 unsigned int reg_addr; member
841 int t3_mi1_read(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr,
843 int t3_mi1_write(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr,
H A Dcxgb_vsc7323.c142 if ((ret = t3_elmr_blk_write(adap, sys_avp[i].reg_addr, in t3_vsc7323_init()
171 if ((ret = t3_elmr_blk_write(adap, fifo_avp[i].reg_addr, in t3_vsc7323_init()
176 if ((ret = t3_elmr_blk_write(adap, xg_avp[i].reg_addr, in t3_vsc7323_init()
/freebsd-13.1/sys/dev/vnic/
H A Dnic_main.c896 uint64_t reg_addr; in nic_handle_mbx_intr() local
924 reg_addr = NIC_PF_QSET_0_127_CFG | in nic_handle_mbx_intr()
927 nic_reg_write(nic, reg_addr, cfg); in nic_handle_mbx_intr()
930 reg_addr = NIC_PF_QSET_0_127_RQ_0_7_CFG | in nic_handle_mbx_intr()
933 nic_reg_write(nic, reg_addr, mbx.rq.cfg); in nic_handle_mbx_intr()
936 reg_addr = NIC_PF_QSET_0_127_RQ_0_7_BP_CFG | in nic_handle_mbx_intr()
939 nic_reg_write(nic, reg_addr, mbx.rq.cfg); in nic_handle_mbx_intr()
945 reg_addr = NIC_PF_QSET_0_127_RQ_0_7_DROP_CFG | in nic_handle_mbx_intr()
948 nic_reg_write(nic, reg_addr, mbx.rq.cfg); in nic_handle_mbx_intr()
951 reg_addr = NIC_PF_QSET_0_127_SQ_0_7_CFG | in nic_handle_mbx_intr()
[all …]
/freebsd-13.1/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DRegisterContextMemory.cpp94 addr_t reg_addr = m_reg_data_addr + reg_info->byte_offset; in WriteRegister() local
95 Status error(WriteRegisterValueToMemory(reg_info, reg_addr, in WriteRegister()
/freebsd-13.1/sys/dev/ixl/
H A Di40e_prototype.h126 u32 reg_addr, u64 reg_val,
129 u32 reg_addr, u64 *reg_val,
577 u32 reg_addr, u32 *reg_val,
579 u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr);
581 u32 reg_addr, u32 reg_val,
583 void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val);
588 u32 reg_addr, u32 reg_val,
594 u32 reg_addr, u32 *reg_val,
/freebsd-13.1/sys/arm64/arm64/
H A Ddebug_monitor.c354 uint64_t *reg_addr, *reg_ctrl; in dbg_find_slot() local
360 reg_addr = monitor->dbg_bvr; in dbg_find_slot()
365 reg_addr = monitor->dbg_wvr; in dbg_find_slot()
374 if (reg_addr[i] == addr && in dbg_find_slot()
/freebsd-13.1/contrib/llvm-project/lldb/source/Commands/
H A DCommandObjectRegister.cpp102 addr_t reg_addr = reg_value.GetAsUInt64(LLDB_INVALID_ADDRESS); in DumpRegister() local
103 if (reg_addr != LLDB_INVALID_ADDRESS) { in DumpRegister()
107 .ResolveLoadAddress(reg_addr, so_reg_addr)) { in DumpRegister()
/freebsd-13.1/contrib/ofed/libcxgb4/
H A Dt4_regs.h39 #define MYPF_REG(reg_addr) (MYPF_BASE + (reg_addr)) argument
42 #define PF0_REG(reg_addr) (PF0_BASE + (reg_addr)) argument
49 #define MYPORT_REG(reg_addr) (MYPORT_BASE + (reg_addr)) argument
52 #define PORT0_REG(reg_addr) (PORT0_BASE + (reg_addr)) argument
61 #define PCIE_MEM_ACCESS_REG(reg_addr, idx) ((reg_addr) + (idx) * 8) argument
62 #define PCIE_MAILBOX_REG(reg_addr, idx) ((reg_addr) + (idx) * 8) argument
63 #define MC_BIST_STATUS_REG(reg_addr, idx) ((reg_addr) + (idx) * 4) argument
64 #define EDC_BIST_STATUS_REG(reg_addr, idx) ((reg_addr) + (idx) * 4) argument
66 #define PCIE_FW_REG(reg_addr, idx) ((reg_addr) + (idx) * 4) argument
/freebsd-13.1/sys/dev/cxgb/
H A Dcxgb_adapter.h431 t3_read_reg(adapter_t *adapter, uint32_t reg_addr) in t3_read_reg() argument
433 return (bus_space_read_4(adapter->bt, adapter->bh, reg_addr)); in t3_read_reg()
437 t3_write_reg(adapter_t *adapter, uint32_t reg_addr, uint32_t val) in t3_write_reg() argument
439 bus_space_write_4(adapter->bt, adapter->bh, reg_addr, val); in t3_write_reg()

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