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/freebsd-13.1/sys/contrib/device-tree/Bindings/display/armada/
H A Dmarvell,dove-lcd.txt13 "axiclk" - axi bus clock for pixel clock
14 "plldivider" - pll divider clock for pixel clock
15 "ext_ref_clk0" - external clock 0 for pixel clock
16 "ext_ref_clk1" - external clock 1 for pixel clock
/freebsd-13.1/sys/contrib/device-tree/Bindings/display/
H A Dbrcm,bcm-vc4.txt31 b) pixel: The pixel clock.
45 b) pixel: The pixel clock that feeds the pixelvalve
72 c) pixel: The DSI pixel clock from CPRMAN
107 clock-names = "pixel", "hdmi";
115 clock-names = "core", "pixel";
137 clock-names = "phy", "escape", "pixel";
H A Dbrcm,bcm2835-dpi.yaml22 - description: The pixel clock that feeds the pixelvalve
27 - const: pixel
53 clock-names = "core", "pixel";
H A Dcirrus,clps711x-fb.txt11 - bits-per-pixel: Bits per pixel.
30 bits-per-pixel = <4>;
H A Dbrcm,bcm2835-dsi0.yaml28 - description: The DSI pixel clock
34 - const: pixel
72 clock-names = "phy", "escape", "pixel";
H A Dbrcm,bcm2835-hdmi.yaml26 - description: The pixel clock
31 - const: pixel
76 clock-names = "pixel", "hdmi";
H A Dwm,wm8505-fb.txt7 - bits-per-pixel : bit depth of framebuffer (16 or 32)
17 bits-per-pixel = <16>;
H A Dvia,vt8500-fb.txt8 - bits-per-pixel : bit depth of framebuffer (16 or 32)
19 bits-per-pixel = <16>;
H A Damlogic,meson-vpu.yaml32 The Video Input Unit is in charge of the pixel scanout from the DDR memory.
41 various planes into a single pixel stream.
49 The VENC is composed of the multiple pixel encoders
H A Datmel,lcdc.txt57 - bits-per-pixel: lcd panel bit-depth.
67 bits-per-pixel = <32>;
H A Dmxsfb.txt51 - bits-per-pixel: <16> for RGB565, <32> for RGB888/666.
65 bits-per-pixel = <32>;
/freebsd-13.1/sys/contrib/device-tree/Bindings/media/i2c/
H A Dmt9p031.txt3 The Aptina MT9P031 is a 1/2.5-inch CMOS active pixel digital image sensor with
14 - pixel-clock-frequency: Pixel clock frequency.
35 pixel-clock-frequency = <96000000>;
/freebsd-13.1/sys/contrib/device-tree/Bindings/display/mediatek/
H A Dmediatek,dpi.txt5 provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel
15 - clock-names: must contain "pixel", "engine", and "pll"
32 clock-names = "pixel", "engine", "pll";
/freebsd-13.1/sys/contrib/device-tree/Bindings/display/imx/
H A Dfsl,imx-fb.txt14 - bits-per-pixel: Bits per pixel
41 bits-per-pixel = <16>;
/freebsd-13.1/contrib/file/magic/Magdir/
H A Dmodem19 # maximal 7 0-bits for pixel sequences or 11 0-bits for EOL in G3
40 # unusual image starting with black pixel
45 # maximal 7 0-bits for pixel sequences or 11 0-bits for EOL in G3
50 # unusual image with black pixel near beginning
H A Dpc9835 # - b0=pixel aspect ratio: 1=2:1 (note: this ignores that the machine's 1:1 pixel aspect ratio is…
37 …d "analog" and "digital" in the doc): 0=Paletted, 1=Fixed colors encoded directly in the pixel data
/freebsd-13.1/sys/contrib/device-tree/Bindings/display/ti/
H A Dti,j721e-dss.yaml67 - description: vp1 Video Port 1 pixel clock
68 - description: vp2 Video Port 2 pixel clock
69 - description: vp3 Video Port 3 pixel clock
70 - description: vp4 Video Port 4 pixel clock
/freebsd-13.1/sys/contrib/device-tree/Bindings/soc/amlogic/
H A Damlogic,canvas.yaml15 A canvas is a collection of metadata that describes a pixel buffer.
19 Many IPs within Amlogic SoCs rely on canvas indexes to read/write pixel data
/freebsd-13.1/sys/contrib/device-tree/Bindings/display/panel/
H A Dpanel-timing.yaml174 Use 0 to drive pixel data on falling edge and
176 Use 1 to drive pixel data on rising edge and
185 sample sync on rising edge of pixel clock.
187 sample sync on falling edge of pixel clock
/freebsd-13.1/sys/contrib/device-tree/Bindings/display/msm/
H A Dedp.txt18 * "pixel"
41 "pixel",
/freebsd-13.1/contrib/llvm-project/clang/lib/Headers/
H A Daltivec.h67 static __inline__ vector pixel __ATTRS_o_ai vec_perm(vector pixel __a,
9046 static __inline__ vector pixel __ATTRS_o_ai vec_sld(vector pixel __a, in vec_sld()
9545 static __inline__ vector pixel __ATTRS_o_ai vec_sll(vector pixel __a, in vec_sll()
9550 static __inline__ vector pixel __ATTRS_o_ai vec_sll(vector pixel __a, in vec_sll()
9555 static __inline__ vector pixel __ATTRS_o_ai vec_sll(vector pixel __a, in vec_sll()
9732 static __inline__ vector pixel __ATTRS_o_ai vec_vsl(vector pixel __a, in vec_vsl()
9737 static __inline__ vector pixel __ATTRS_o_ai vec_vsl(vector pixel __a, in vec_vsl()
9742 static __inline__ vector pixel __ATTRS_o_ai vec_vsl(vector pixel __a, in vec_vsl()
9846 static __inline__ vector pixel __ATTRS_o_ai vec_slo(vector pixel __a, in vec_slo()
9851 static __inline__ vector pixel __ATTRS_o_ai vec_slo(vector pixel __a, in vec_slo()
[all …]
/freebsd-13.1/sys/contrib/device-tree/Bindings/display/bridge/
H A Dadi,adv7511.txt37 pixel), "2x" (two clock cycles per pixel), "ddr" (one clock cycle per pixel,
70 - adi,clock-delay: Video data clock delay relative to the pixel clock, in ps
/freebsd-13.1/sys/contrib/device-tree/src/arm/
H A Dlogicpd-torpedo-37xx-devkit.dts62 /* The DM3730 has a faster L3 than OMAP35, so increase pixel clock */
64 pixel-clock-frequency = <90000000>;
/freebsd-13.1/sys/contrib/device-tree/Bindings/media/
H A Dcdns,csi2tx.txt5 4 CSI lanes in output, and up to 4 different pixel streams in input.
15 * pixel_if[0-3]_clk: pixel stream output clock, one for each stream
H A Dcdns,csi2rx.txt5 lanes in input, and 4 different pixel streams in output.
14 * pixel_if[0-3]_clk: pixel stream output clock, one for each stream

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