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Searched refs:phase (Results 1 – 25 of 196) sorted by relevance

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/freebsd-13.1/sys/contrib/zstd/lib/compress/
H A Dzstd_cwksp.h152 ZSTD_cwksp_alloc_phase_e phase; member
203 assert(phase >= ws->phase); in ZSTD_cwksp_internal_advance_phase()
204 if (phase > ws->phase) { in ZSTD_cwksp_internal_advance_phase()
205 if (ws->phase < ZSTD_cwksp_alloc_buffers && in ZSTD_cwksp_internal_advance_phase()
209 if (ws->phase < ZSTD_cwksp_alloc_aligned && in ZSTD_cwksp_internal_advance_phase()
223 ws->phase = phase; in ZSTD_cwksp_internal_advance_phase()
241 ZSTD_cwksp_internal_advance_phase(ws, phase); in ZSTD_cwksp_reserve_internal()
307 ZSTD_cwksp_internal_advance_phase(ws, phase); in ZSTD_cwksp_reserve_table()
464 if (ws->phase > ZSTD_cwksp_alloc_buffers) { in ZSTD_cwksp_clear()
465 ws->phase = ZSTD_cwksp_alloc_buffers; in ZSTD_cwksp_clear()
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/freebsd-13.1/contrib/ntp/libparse/
H A Dclk_meinberg.c225 unsigned short phase; /* current input phase */ member
610 if ( msg_buf->phase == MBG_NONE ) in gps_input()
618 msg_buf->phase = MBG_HEADER; /* receiving header */ in gps_input()
643 if ((msg_buf->phase == MBG_STRING) && in gps_input()
651 msg_buf->phase = MBG_NONE; /* buffer overflow - discard */ in gps_input()
658 switch (msg_buf->phase) in gps_input()
674 msg_buf->phase = MBG_NONE; in gps_input()
690 if ( msg_buf->phase == MBG_HEADER ) in gps_input()
708 msg_buf->phase = MBG_NONE; /* back to hunting mode */ in gps_input()
715 msg_buf->phase = MBG_NONE; /* back to hunting mode */ in gps_input()
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/freebsd-13.1/sys/kern/
H A Dkern_poll.c239 static uint32_t phase; variable
317 phase = 0; in hardclock_device_poll()
320 if (phase <= 2) { in hardclock_device_poll()
321 if (phase != 0) in hardclock_device_poll()
323 phase = 1; in hardclock_device_poll()
327 phase = 2; in hardclock_device_poll()
388 phase = 5; in netisr_pollmore()
412 phase = 0; in netisr_pollmore()
425 phase = 6; in netisr_pollmore()
450 phase = 3; in netisr_poll()
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/freebsd-13.1/sys/contrib/openzfs/tests/zfs-tests/tests/functional/suid/
H A Dsuid_write_to_file.c37 const char *name, *phase; in main() local
76 phase = argv[2]; in main()
77 if (strcmp(phase, "PRECRASH") == 0) { in main()
113 } else if (strcmp(phase, "REPLAY") == 0) { in main()
116 fprintf(stderr, "Invalid phase %s\n", phase); in main()
/freebsd-13.1/sys/contrib/device-tree/Bindings/mmc/
H A Dexynos-dw-mshc.txt30 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
31 in transmit mode and CIU clock phase shift value in receive mode for single
35 * samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift value
36 in transmit mode and CIU clock phase shift value in receive mode for double
39 * samsung,dw-mshc-hs400-timing: Specifies the value of CIU TX and RX clock phase
45 - First Cell: CIU clock phase shift value for tx mode.
46 - Second Cell: CIU clock phase shift value for rx mode.
49 - valid value for tx phase shift and rx phase shift is 0 to 7.
50 - when CIU clock divider value is set to 3, all possible 8 phase shift
53 phase shift clocks should be 0.
/freebsd-13.1/sys/contrib/openzfs/tests/zfs-tests/cmd/xattrtest/
H A Dxattrtest.c93 static int phase = PHASE_ALL; variable
190 phase = strtol(optarg, NULL, 0); in parse_args()
191 if (phase <= PHASE_ALL || phase >= PHASE_INVAL) { in parse_args()
224 fprintf(stdout, "only: %d\n", phase); in parse_args()
294 post_hook(char *phase) in post_hook() argument
296 char *argv[3] = { script, phase, (char *)0 }; in post_hook()
691 if (phase == PHASE_ALL || phase == PHASE_CREATE) { in main()
697 if (phase == PHASE_ALL || phase == PHASE_SETXATTR) { in main()
703 if (phase == PHASE_ALL || phase == PHASE_GETXATTR) { in main()
709 if (!keep_files && (phase == PHASE_ALL || phase == PHASE_UNLINK)) { in main()
/freebsd-13.1/contrib/tcpdump/
H A Dprint-isakmp.c584 uint32_t phase,\
622 uint32_t phase,
685 uint32_t phase,
1363 switch (phase) { in ikev1_id_print()
2644 uint32_t phase, in ikev2_e_print()
2689 phase, doi, proto, depth+1); in ikev2_e_print()
2821 int phase; in ikev1_print() local
2827 if (phase == 1) in ikev1_print()
2828 ND_PRINT((ndo," phase %d", phase)); in ikev1_print()
2980 int phase; in ikev2_print() local
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/freebsd-13.1/contrib/wpa/hostapd/
H A Dhostapd.eap_user12 # [2] flag in the end of the line can be used to mark users for tunneled phase
14 # identity can be used in the unencrypted phase 1 and the real user identity
15 # is transmitted only within the encrypted tunnel in phase 2. If non-anonymous
16 # access is needed, two user entries is needed, one for phase 1 and another
17 # with the same username for phase 2.
26 # this are to set anonymous phase 1 identity for EAP-PEAP and EAP-TTLS and to
28 # first matching entry is selected, so * should be used as the last phase 1
34 # is only allowed for phase 1 identities.
94 # Default to EAP-SIM and EAP-AKA based on fixed identity prefixes in phase 2
/freebsd-13.1/sys/contrib/device-tree/Bindings/mfd/
H A Daxp20x.txt126 DCDC2 : DC-DC buck : vin2-supply : poly-phase capable
127 DCDC3 : DC-DC buck : vin3-supply : poly-phase capable
129 DCDC5 : DC-DC buck : vin5-supply : poly-phase capable
130 DCDC6 : DC-DC buck : vin6-supply : poly-phase capable
153 DCDCA : DC-DC buck : vina-supply : poly-phase capable
154 DCDCB : DC-DC buck : vinb-supply : poly-phase capable
155 DCDCC : DC-DC buck : vinc-supply : poly-phase capable
156 DCDCD : DC-DC buck : vind-supply : poly-phase capable
157 DCDCE : DC-DC buck : vine-supply : poly-phase capable
202 DCDC2 : DC-DC buck : vin2-supply : poly-phase capable
[all …]
/freebsd-13.1/contrib/libxo/xolint/
H A Dxolint.pl246 my $phase = 0;
269 $phase = 0;
271 } elsif ($phase == 0 && $ch eq ":") {
272 $phase += 1;
275 $phase += 1;
290 $build[$phase] .= $ch;
/freebsd-13.1/sys/contrib/device-tree/Bindings/sound/
H A Dmax98504.txt20 applied during the "attack hold" and "timed hold" phase, the value must be
22 - maxim,brownout-attack-hold-ms - the brownout attack hold phase time in ms,
24 - maxim,brownout-timed-hold-ms - the brownout timed hold phase time in ms,
26 - maxim,brownout-release-rate-ms - the brownout release phase step time in ms,
/freebsd-13.1/sys/contrib/device-tree/Bindings/leds/backlight/
H A Dsky81452-backlight.txt14 - skyworks,phase-shift : Enable phase shift mode
27 skyworks,phase-shift;
/freebsd-13.1/sys/contrib/device-tree/Bindings/power/supply/
H A Drohm,bd99954.yaml35 # First a constant current (5) phase (CC)
36 # Then constant voltage (CV) phase (after the battery voltage has reached
70 # Current used at trickle-charge phase (8 in above chart)
75 # Current used at pre-charge phase (6 in above chart)
80 # Current used at fast charge constant current phase (5 in above chart)
85 # The constant voltage used in fast charging phase (4 in above chart)
/freebsd-13.1/tests/sys/cddl/zfs/tests/txg_integrity/
H A Dtxg_integrity.c311 static phase_t phase; variable
430 if (perm_idx == NUM_CHUNKS / 2 && phase == follower_syncs){ in follower()
459 if (perm_idx == NUM_CHUNKS / 2 && phase == leader_syncs){ in leader()
496 for(phase=leader_syncs; phase < NUM_PHASES; phase++){ in main()
/freebsd-13.1/sys/contrib/openzfs/include/os/freebsd/spl/sys/
H A Dsysmacros.h231 #define P2PHASEUP(x, align, phase) ((phase) - (((phase) - (x)) & -(align))) argument
270 #define P2PHASEUP_TYPED(x, align, phase, type) \ argument
271 ((type)(phase) - (((type)(phase) - (type)(x)) & -(type)(align)))
/freebsd-13.1/sys/cddl/contrib/opensolaris/uts/common/sys/
H A Dsysmacros.h287 #define P2PHASEUP(x, align, phase) ((phase) - (((phase) - (x)) & -(align))) argument
326 #define P2PHASEUP_TYPED(x, align, phase, type) \ argument
327 ((type)(phase) - (((type)(phase) - (type)(x)) & -(type)(align)))
/freebsd-13.1/sys/contrib/openzfs/lib/libspl/include/os/linux/sys/
H A Dsysmacros.h88 #define P2PHASEUP_TYPED(x, align, phase, type) \ argument
89 ((type)(phase) - (((type)(phase) - (type)(x)) & -(type)(align)))
/freebsd-13.1/sys/crypto/openssl/arm/
H A Dghashv8-armx.S42 .byte 0x26,0x4e,0xe0,0xf2 @ pmull q10,q0,q11 @ 1st phase
48 vext.8 q10,q0,q0,#8 @ 2nd phase
81 .byte 0x26,0x4e,0xe0,0xf2 @ pmull q10,q0,q11 @ 1st phase of reduction
87 vext.8 q10,q0,q0,#8 @ 2nd phase of reduction
171 .byte 0x26,0x4e,0xe0,0xf2 @ pmull q10,q0,q11 @ 1st phase of reduction
184 vext.8 q10,q0,q0,#8 @ 2nd phase of reduction
211 .byte 0x26,0x4e,0xe0,0xf2 @ pmull q10,q0,q11 @ 1st phase of reduction
217 vext.8 q10,q0,q0,#8 @ 2nd phase of reduction
/freebsd-13.1/sys/contrib/device-tree/Bindings/spi/
H A Dspi-samsung.txt61 - samsung,spi-feedback-delay: The sampling phase shift to be applied on the
65 - 0: No phase shift.
66 - 1: 90 degree phase shift sampling.
67 - 2: 180 degree phase shift sampling.
68 - 3: 270 degree phase shift sampling.
/freebsd-13.1/sys/contrib/device-tree/Bindings/clock/
H A Daltr_socfpga.txt26 - clk-phase : For the sdmmc_clk, contains the value of the clock phase that controls
28 value is the cclk_in_drv(drvsel). The clk-phase is used to enable the correct
/freebsd-13.1/contrib/ntp/ntpd/
H A Drefclock_irig.c216 double phase, freq; /* logical clock phase and frequency */ member
445 up->phase += (up->freq + clock_codec) / SECOND; in irig_receive()
446 up->phase += pp->fudgetime2 / 1e6; in irig_receive()
447 if (up->phase >= .5) { in irig_receive()
448 up->phase -= 1.; in irig_receive()
449 } else if (up->phase < -.5) { in irig_receive()
450 up->phase += 1.; in irig_receive()
659 up->phase += dtemp / up->tc; in irig_base()
/freebsd-13.1/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dst,stm32-fmc2-ebi.yaml132 phase in nanoseconds used for asynchronous read/write transactions.
136 phase in nanoseconds used for asynchronous multiplexed read/write
140 description: This property defines the duration of the data setup phase
148 description: This property defines the duration of the data hold phase
161 phase in nanoseconds used for asynchronous write transactions.
165 phase in nanoseconds used for asynchronous multiplexed write
170 phase in nanoseconds used for asynchronous write transactions.
177 description: This property defines the duration of the data hold phase
/freebsd-13.1/sys/contrib/device-tree/Bindings/regulator/
H A Dmps,mpq7920.yaml60 mps,buck-phase-delay:
64 defines the phase delay of this buck, must be one of the following
104 mps,buck-phase-delay = /bits/ 8 <2>;
/freebsd-13.1/sys/contrib/openzfs/include/os/linux/spl/sys/
H A Dsysmacros.h185 #define P2PHASEUP_TYPED(x, align, phase, type) \ argument
186 ((type)(phase) - (((type)(phase) - (type)(x)) & -(type)(align)))
/freebsd-13.1/sys/contrib/ena-com/
H A Dena_eth_com.c44 expected_phase = io_cq->phase; in ena_com_get_next_rx_cdesc()
113 io_sq->phase ^= 1; in ena_com_write_bounce_buffer_to_dev()
249 io_sq->phase ^= 1; in ena_com_sq_update_tail()
327 meta_desc->len_ctrl |= ((u32)io_sq->phase << in ena_com_create_meta()
485 desc->len_ctrl |= ((u32)io_sq->phase << ENA_ETH_IO_TX_DESC_PHASE_SHIFT) & in ena_com_prepare_tx()
540 desc->len_ctrl |= ((u32)io_sq->phase << in ena_com_prepare_tx()
661 (io_sq->phase & ENA_ETH_IO_RX_DESC_PHASE_MASK); in ena_com_add_single_rx_desc()

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