| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonDepInstrInfo.td | 18 let hasNewValue = 1;
19 let opNewValue = 0;
20 let prefersSlot3 = 1;
39 let opNewValue = 0;
52 let opNewValue = 0;
220 let isAdd = 1;
236 let isAdd = 1;
4117 let isFP = 1;
4129 let isFP = 1;
4139 let isFP = 1;
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| H A D | HexagonDepInstrFormats.td | 13 let Inst{12-8} = Vu32{4-0};
17 let Inst{4-0} = Vdd32{4-0};
21 let Inst{11-5} = Ii{6-0};
25 let Inst{1-0} = Pd4{1-0};
33 let Inst{1-0} = Pd4{1-0};
38 let Inst{7-1} = Ii{8-2};
45 let Inst{8-8} = n1{0-0};
50 let Inst{7-7} = Ii{0-0};
52 let Inst{11-8} = II{5-2};
53 let Inst{6-5} = II{1-0};
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| H A D | HexagonDepOperands.td | 16 def s6_0ImmOperand : AsmOperandClass { let Name = "s6_0Imm"; let RenderMethod = "addSignedImmOperan…
17 def s6_0Imm : Operand<i32> { let ParserMatchClass = s6_0ImmOperand; let DecoderMethod = "s6_0ImmDec…
19 def s32_0ImmOperand : AsmOperandClass { let Name = "s32_0Imm"; let RenderMethod = "addSignedImmOper…
22 def u10_0ImmOperand : AsmOperandClass { let Name = "u10_0Imm"; let RenderMethod = "addImmOperands";…
25 def u32_0ImmOperand : AsmOperandClass { let Name = "u32_0Imm"; let RenderMethod = "addImmOperands";…
28 def m32_0ImmOperand : AsmOperandClass { let Name = "m32_0Imm"; let RenderMethod = "addImmOperands";…
32 def b13_2Imm : Operand<OtherVT> { let ParserMatchClass = b13_2ImmOperand; let DecoderMethod = "brta…
35 def b15_2Imm : Operand<OtherVT> { let ParserMatchClass = b15_2ImmOperand; let DecoderMethod = "brta…
38 def a30_2Imm : Operand<i32> { let ParserMatchClass = a30_2ImmOperand; let DecoderMethod = "brtarget…
41 def b30_2Imm : Operand<OtherVT> { let ParserMatchClass = b30_2ImmOperand; let DecoderMethod = "brta…
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MicroMipsInstrFormats.td | 46 let Size = 2;
64 let Inst{9-7} = rd;
65 let Inst{6-4} = rt;
66 let Inst{3-1} = rs;
78 let Inst{9-7} = rd;
79 let Inst{6-4} = rs;
120 let Inst{0} = 0;
153 let Inst{9-7} = rt;
166 let Inst{0} = 0;
176 let Inst{0} = 1;
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| H A D | MicroMips32r6InstrFormats.td | 52 let Inst{15-10} = op;
53 let Inst{9-7} = rs;
63 let Inst{9-5} = rs;
64 let Inst{4-0} = op;
75 let Inst{25-21} = rt;
76 let Inst{20-16} = rs;
245 let Inst{10-6} = 0;
246 let Inst{5-0} = 0;
272 let Inst{10} = 0;
644 let Inst{15} = 0;
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| H A D | MipsMSAInstrFormats.td | 37 let Inst{18-16} = m;
38 let Inst{15-11} = ws;
39 let Inst{10-6} = wd;
50 let Inst{19-16} = m;
52 let Inst{10-6} = wd;
63 let Inst{20-16} = m;
65 let Inst{10-6} = wd;
75 let Inst{22} = 0b0;
76 let Inst{21-16} = m;
120 let Inst{16} = df;
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| H A D | MipsInstrFormats.td | 47 let KeyCol = ["se"];
61 let KeyCol = ["se"];
79 let Size = 4;
128 let isPseudo = 1;
143 let isPseudo = 1;
145 let Pattern = [];
161 let Opcode = op;
377 let rt = rd;
814 let cond = c;
842 let Inst{17} = 0;
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| H A D | MicroMipsDSPInstrFormats.td | 30 let Inst{25-21} = rt;
31 let Inst{20-16} = rs;
32 let Inst{15-11} = rd;
33 let Inst{10-0} = op;
41 let Inst{25-21} = rt;
42 let Inst{20-16} = rs;
43 let Inst{15-6} = op;
53 let Inst{25-21} = rt;
54 let Inst{20-16} = rs;
55 let Inst{15-14} = ac;
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| H A D | MipsDSPInstrFormats.td | 18 let KeyCol = ["dsp"];
72 let Inst{25-21} = rs;
73 let Inst{20-16} = rt;
74 let Inst{15-11} = rd;
75 let Inst{10-6} = op;
85 let Inst{25-21} = rs;
86 let Inst{20-16} = 0;
101 let Inst{15-11} = 0;
141 let Inst{25-21} = 0;
263 let Inst{10-6} = 0;
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| H A D | Mips32r6InstrFormats.td | 20 let ColFields = ["Arch"];
22 let KeyCol = ["mipsr6"];
184 let Inst{25-21} = rs;
185 let Inst{20-16} = rt;
186 let Inst{15-0} = imm;
211 let Inst{20-16} = rt;
244 let Inst{10-6} = fd;
334 let Inst{6} = 0;
559 let Inst{10} = 1;
560 let Inst{9-6} = 0;
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| H A D | Mips16InstrFormats.td | 64 let Size=2;
77 let Size=4;
215 let l = _l;
261 let f = _f;
283 let f = _f;
391 let s =_s;
416 let X = _X;
515 let op=_op;
540 let f = _f;
566 let f = _f;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleA57WriteRes.td | 63 let Latency = Lat;
70 let Latency = Lat;
91 let NumMicroOps = 2;
96 let Latency = 6;
97 let NumMicroOps = 2;
101 let Latency = 6;
102 let NumMicroOps = 2;
106 let Latency = 7;
107 let NumMicroOps = 2;
243 let Latency = Lat; let NumMicroOps = 2;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedA57WriteRes.td | 65 let NumMicroOps = 2;
70 let Latency = 6;
71 let NumMicroOps = 2;
75 let Latency = 7;
76 let NumMicroOps = 2;
80 let Latency = 8;
81 let NumMicroOps = 2;
84 let Latency = 9;
85 let NumMicroOps = 2;
88 let Latency = 8;
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| H A D | AArch64SchedKryoDetails.td | 16 let Latency = 3; let NumMicroOps = 2;
23 let Latency = 3; let NumMicroOps = 2;
30 let Latency = 4; let NumMicroOps = 3;
36 let Latency = 4; let NumMicroOps = 4;
42 let Latency = 3; let NumMicroOps = 4;
66 let Latency = 3; let NumMicroOps = 2;
72 let Latency = 3; let NumMicroOps = 2;
78 let Latency = 2; let NumMicroOps = 2;
84 let Latency = 2; let NumMicroOps = 2;
90 let Latency = 2; let NumMicroOps = 2;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrFormats.td | 43 let Namespace = "R600";
45 let InOperandList = ins;
46 let AsmString = asm;
47 let Pattern = pattern;
48 let Itinerary = itin;
51 let isCodeGenOnly = 1;
53 let TSFlags{4} = Trig;
54 let TSFlags{5} = Op3;
61 let TSFlags{10} = Op1;
62 let TSFlags{11} = Op2;
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| H A D | VOPInstructions.td | 36 let mayLoad = 0;
37 let mayStore = 0;
40 let VALU = 1;
70 let VOP3 = 1;
101 let Size = 8;
117 let VOP3 = 1;
118 let VALU = 1;
140 let VOP3P = 1;
153 let VALU = 1;
154 let VOP3 = 1;
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| H A D | SIInstrFormats.td | 228 let isPseudo = 1;
234 let SALU = 1;
239 let VALU = 1;
240 let Uses = [EXEC];
249 let mayLoad = 0;
250 let mayStore = 0;
318 let Inst{14} = da;
379 let VINTRP = 1;
391 let mayLoad = 0;
392 let mayStore = 0;
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | GenericOpcodes.td | 145 let mayStore = true;
152 let mayLoad = true;
153 let mayStore = true;
999 let mayLoad = true;
1007 let mayLoad = true;
1015 let mayLoad = true;
1025 let mayLoad = true;
1033 let mayLoad = true;
1041 let mayLoad = true;
1067 let mayLoad = true;
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| /freebsd-13.1/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | Attr.td | 614 let Ignored = 1;
615 let ASTNode = 0;
819 let Args = [
2322 let Args = [
2386 let Subjects =
2798 let Clone = 0;
2808 let Clone = 0;
3603 let Args = [
3623 let Args = [
3646 let Args = [
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrFormats.td | 17 let Size = 4;
82 let Size = 8;
151 let CR = 0;
304 let A = 0;
312 let A = R;
313 let B = R;
314 let C = 0;
342 let A = 0;
511 let A = 0;
512 let B = 0;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrFormatsV.td | 75 let Inst{31} = 1;
76 let Inst{30} = 1;
92 let Inst{31} = 0;
108 let Inst{31} = 1;
128 let Inst{25} = vm;
148 let Inst{25} = vm;
167 let Inst{25} = vm;
187 let Inst{25} = vm;
206 let Inst{25} = vm;
228 let Inst{25} = vm;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86SchedHaswell.td | 22 let IssueWidth = 4;
24 let LoadLatency = 5;
71 let BufferSize=60;
175 let Latency = 2;
471 let Latency = 2;
476 let Latency = 6;
482 let Latency = 2;
486 let Latency = 2;
548 let Latency = 7;
649 let Latency = 7;
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| H A D | X86SchedSkylakeClient.td | 17 let IssueWidth = 6;
19 let LoadLatency = 5;
70 let BufferSize=60;
164 let Latency = 2;
419 let Latency = 2;
424 let Latency = 6;
430 let Latency = 3;
434 let Latency = 2;
538 let Latency = 4;
549 let Latency = 8;
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| H A D | X86SchedSkylakeServer.td | 17 let IssueWidth = 6;
19 let LoadLatency = 5;
70 let BufferSize=60;
165 let Latency = 2;
420 let Latency = 2;
425 let Latency = 6;
431 let Latency = 3;
435 let Latency = 2;
539 let Latency = 4;
550 let Latency = 8;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCInstrFormats.td | 104 let Size = sz;
122 let isPseudo = 1;
162 let Inst{5} = N;
181 let Inst{4} = 0;
236 let Inst{5} = N;
238 let Inst{3} = 0;
284 let Inst{5} = 1;
331 let Inst{5} = 0;
753 let Size = 6;
783 let c = i;
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