| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 98 if (TLI->isTypeLegal(VT) in numberRCValPredInSU() 136 if (TLI->isTypeLegal(VT) in numberRCValSuccInSU() 332 if (TLI->isTypeLegal(VT) in rawRegPressureDelta() 344 if (TLI->isTypeLegal(VT) && TLI->getRegClassFor(VT) in rawRegPressureDelta() 481 if (TLI->isTypeLegal(VT)) { in scheduledNode() 492 if (TLI->isTypeLegal(VT)) { in scheduledNode()
|
| H A D | LegalizeTypesGeneric.cpp | 110 while (!isTypeLegal(NVT)) { in ExpandRes_BITCAST() 120 if (isTypeLegal(NVT)) { in ExpandRes_BITCAST() 352 if (!isTypeLegal(NVT)) { in ExpandOp_BITCAST() 533 isTypeLegal(CondLHSVT) && in SplitRes_SELECT()
|
| H A D | FastISel.cpp | 251 if (!TLI.isTypeLegal(VT)) { in getRegForValue() 462 if (!TLI.isTypeLegal(VT)) { in selectBinaryOp() 1384 if (!TLI.isTypeLegal(DstVT)) in selectCast() 1388 if (!TLI.isTypeLegal(SrcVT)) in selectCast() 1419 !TLI.isTypeLegal(SrcEVT) || !TLI.isTypeLegal(DstEVT)) in selectBitCast() 1460 if (ETy == MVT::Other || !TLI.isTypeLegal(ETy)) in selectFreeze() 1635 if (!TLI.isTypeLegal(IntVT)) in selectFNeg() 1669 if (!TLI.isTypeLegal(VT) && VT != MVT::i1) in selectExtractValue() 2177 if (VT == MVT::Other || !TLI.isTypeLegal(VT)) { in handlePHINodesInSuccessorBlocks()
|
| H A D | LegalizeTypes.cpp | 139 } else if (isTypeLegal(Res.getValueType()) || IgnoreNodeResults(&Node)) { in PerformExpensiveChecks() 453 if (!isTypeLegal(Node.getValueType(i))) { in run() 462 !isTypeLegal(Node.getOperand(i).getValueType())) { in run()
|
| H A D | LegalizeVectorTypes.cpp | 1966 if (TLI.isTypeLegal(SrcVT) && !TLI.isTypeLegal(SplitSrcVT) && in SplitVecRes_ExtendOp() 1967 TLI.isTypeLegal(NewSrcVT) && TLI.isTypeLegal(SplitLoVT)) { in SplitVecRes_ExtendOp() 2814 if (isTypeLegal(LoOutVT) || in SplitVecOp_TruncateHelper() 3231 } while (!TLI.isTypeLegal(NextVT)); in CollectOpsToWiden() 3288 while (!TLI.isTypeLegal(VT) && NumElts != 1) { in WidenVecRes_BinaryCanTrap() 3575 if (TLI.isTypeLegal(InWidenVT)) { in WidenVecRes_Convert() 3845 if (TLI.isTypeLegal(NewInVT)) { in WidenVecRes_BITCAST() 4639 if (TLI.isTypeLegal(FixedVT) && in WidenVecOp_EXTEND() 4760 if (TLI.isTypeLegal(WideDstVT)) { in WidenVecOp_FP_TO_XINT_SAT() 4785 if (TLI.isTypeLegal(NewVT)) { in WidenVecOp_BITCAST() [all …]
|
| H A D | DAGCombiner.cpp | 4873 if (!TLI.isTypeLegal(XVT)) in hoistLogicOpWithSameOpcodeHands() 5566 if (!TLI.isTypeLegal(VT)) in combineShiftAnd1ToBitTest() 6930 if (!TLI.isTypeLegal(VT)) in MatchRotate() 15666 if (isTypeLegal(STMemType)) in getTruncatedStoreValue() 16599 if (!DC->isTypeLegal(VT)) in ShrinkLoadReplaceStoreWithStore() 17411 if (TLI.isTypeLegal(Ty) && TLI.isTypeLegal(MemVT) && in tryStoreMergeOfConstants() 19114 if (!isTypeLegal(VecVT) || in reduceBuildVecExtToExtBuildVec() 19419 if (!isTypeLegal(VT)) in reduceBuildVecToShuffle() 19790 if (TLI.isTypeLegal(OpVT)) in combineConcatVectorOfScalars() 20047 if (!TLI.isTypeLegal(NVT) || !TLI.isTypeLegal(Scalar.getValueType())) in visitCONCAT_VECTORS() [all …]
|
| H A D | InstrEmitter.cpp | 110 if (TLI->isTypeLegal(VT)) in EmitCopyFromReg() 216 if (i < NumResults && TLI->isTypeLegal(Node->getSimpleValueType(i))) { in CreateVirtualRegisters() 389 TLI->isTypeLegal(OpVT) in AddOperand()
|
| H A D | LegalizeDAG.cpp | 448 TLI.isTypeLegal(MVT::i32)) { in OptimizeFloatStore() 458 if (TLI.isTypeLegal(MVT::i64)) { in OptimizeFloatStore() 465 if (TLI.isTypeLegal(MVT::i32) && !ST->isVolatile()) { in OptimizeFloatStore() 645 if (TLI.isTypeLegal(StVT)) { in LegalizeStoreOps() 883 if (TLI.isTypeLegal(SrcVT) || // Same as SrcVT == LoadVT? in LegalizeLoadOps() 1499 if (TLI.isTypeLegal(IVT)) { in getSignAsIntValue() 2293 if (SrcVT == MVT::i32 && TLI.isTypeLegal(MVT::f64) && in ExpandLegalINT_TO_FP() 2993 if (!TLI.isTypeLegal(EltVT)) { in ExpandNode() 3285 assert(TLI.isTypeLegal(HalfType)); in ExpandNode() 3734 assert(TLI.isTypeLegal(VT.getScalarType())&& "Element type must be legal"); in ExpandNode() [all …]
|
| H A D | LegalizeIntegerTypes.cpp | 296 if (!TLI.isTypeLegal(SVT)) in PromoteIntRes_AtomicCmpSwap() 427 if (isTypeLegal(WideOutVT)) { in PromoteIntRes_BITCAST() 976 if (TLI.isTypeLegal(PromotedType)) { in PromoteIntRes_DIVFIX() 1701 assert(!((NumElts & 1) && (!TLI.isTypeLegal(VecVT))) && in PromoteIntOp_BUILD_VECTOR() 3800 (Action == TargetLowering::Legal && TLI.isTypeLegal(NVT)) || in ExpandIntRes_Shift() 4353 if (TLI.isTypeLegal(LHSLo.getValueType()) && in IntegerExpandSetCCOperands() 4354 TLI.isTypeLegal(RHSLo.getValueType())) in IntegerExpandSetCCOperands() 4360 if (TLI.isTypeLegal(LHSHi.getValueType()) && in IntegerExpandSetCCOperands() 4361 TLI.isTypeLegal(RHSHi.getValueType())) in IntegerExpandSetCCOperands()
|
| H A D | LegalizeTypes.h | 67 bool isTypeLegal(EVT VT) const { in isTypeLegal() function 73 return VT.isSimple() && TLI.isTypeLegal(VT); in isSimpleLegalType()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 932 assert(isTypeLegal(VT)); in canOpTrap() 1131 if (!TLI->isTypeLegal(NewVT)) in getVectorTypeBreakdownMVT() 1156 if (isTypeLegal(*I)) in isLegalRC() 1319 if (isTypeLegal(IVT)) { in computeRegisterProperties() 1330 if (isTypeLegal(MVT::f64)) { in computeRegisterProperties() 1354 if (!isTypeLegal(MVT::f64)) { in computeRegisterProperties() 1363 if (!isTypeLegal(MVT::f32)) { in computeRegisterProperties() 1373 if (!isTypeLegal(MVT::f16)) { in computeRegisterProperties() 1392 if (isTypeLegal(VT)) in computeRegisterProperties() 1450 if (isTypeLegal(NVT)) { in computeRegisterProperties() [all …]
|
| H A D | Analysis.cpp | 248 TLI.isTypeLegal(EVT::getEVT(T1)) && TLI.isTypeLegal(EVT::getEVT(T2))); in isNoopBitcast()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 248 if (!isTypeLegal(RetTy, RetVT)) in foldX86XALUIntrinsic() 1544 if (!TLI.isTypeLegal(DstVT)) in X86SelectZExt() 1602 if (!TLI.isTypeLegal(DstVT)) in X86SelectSExt() 1842 if (!isTypeLegal(I->getType(), VT)) in X86SelectShift() 1929 if (!isTypeLegal(I->getType(), VT)) in X86SelectDivRem() 2527 if (!TLI.isTypeLegal(SrcVT)) in X86SelectTrunc() 2671 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall() 2804 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall() 2868 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall() 2993 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall() [all …]
|
| H A D | X86ISelLowering.cpp | 642 if (isTypeLegal(MVT::f32)) { in X86TargetLowering() 652 if (isTypeLegal(MVT::f64)) { in X86TargetLowering() 5389 isTypeLegal(LoadVT) && isTypeLegal(BitcastVT)) in isLoadBitCastBeneficial() 5526 return isTypeLegal(VT); in shouldSplatInsEltVarIndex() 5531 if (isTypeLegal(VT)) in hasFastEqualityCompare() 18977 if (!isTypeLegal(IdxSVT) || !isTypeLegal(IdxVT)) in LowerINSERT_VECTOR_ELT() 38541 if (TLI.isTypeLegal(VT)) in combineShuffle() 42124 if (!TLI.isTypeLegal(VT)) in combineSelect() 50380 if (Subtarget.hasAVX() && TLI.isTypeLegal(VT) && TLI.isTypeLegal(SrcVT)) { in combineConcatVectors() 50940 if (TLI.isTypeLegal(VT) && TLI.isTypeLegal(In.getValueType())) in combineEXTEND_VECTOR_INREG() [all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 670 return isTypeLegal(VT) ? VT : MVT::INVALID_SIMPLE_VALUE_TYPE; in hasFastEqualityCompare() 894 bool isTypeLegal(EVT VT) const { in isTypeLegal() function 1118 return (VT == MVT::Other || isTypeLegal(VT)) && 1132 return (VT == MVT::Other || isTypeLegal(VT)) && 1146 return (VT == MVT::Other || isTypeLegal(VT)) && 1213 return (!isTypeLegal(VT) || getOperationAction(Op, VT) == Expand); in isOperationExpand() 1218 return (VT == MVT::Other || isTypeLegal(VT)) && in isOperationLegal() 1269 return isTypeLegal(ValVT) && in isTruncStoreLegalOrCustom() 1394 } while (!isTypeLegal(NVT) || in getTypeToPromoteTo() 2561 if (!Load->hasOneUse() && (isTypeLegal(LoadVT) || !isTypeLegal(VT)) && in isExtLoad() [all …]
|
| H A D | BasicTTIImpl.h | 354 bool isTypeLegal(Type *Ty) { in isTypeLegal() function 356 return getTLI()->isTypeLegal(VT); in isTypeLegal() 463 return TLI->isTypeLegal(VT) && in haveFastSqrt()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 187 bool isTypeLegal(Type *Ty, MVT &VT); 673 bool ARMFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in ARMFastISel 682 return TLI.isTypeLegal(VT); in isTypeLegal() 686 if (isTypeLegal(Ty, VT)) return true; in isLoadTypeLegal() 1527 if (!isTypeLegal(Ty, DstVT)) in SelectIToFP() 1572 if (!isTypeLegal(RetTy, DstVT)) in SelectFPToI() 1601 if (!isTypeLegal(I->getType(), VT)) in SelectSelect() 1678 if (!isTypeLegal(Ty, VT)) in SelectDiv() 1707 if (!isTypeLegal(Ty, VT)) in SelectRem() 2207 else if (!isTypeLegal(RetTy, RetVT)) in ARMEmitLibcall() [all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 141 bool isTypeLegal(Type *Ty, MVT &VT); 270 bool PPCFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in PPCFastISel 279 return TLI.isTypeLegal(VT); in isTypeLegal() 285 if (isTypeLegal(Ty, VT)) return true; in isLoadTypeLegal() 1064 if (!isTypeLegal(DstTy, DstVT)) in SelectIToFP() 1189 if (!isTypeLegal(DstTy, DstVT)) in SelectFPToI() 1202 if (!isTypeLegal(SrcTy, SrcVT)) in SelectFPToI() 1575 else if (!isTypeLegal(RetTy, RetVT) && RetVT != MVT::i16 && in fastLowerCall() 1621 if (!isTypeLegal(ArgTy, ArgVT) && ArgVT != MVT::i16 && ArgVT != MVT::i8) in fastLowerCall()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 172 bool isTypeLegal(Type *Ty, MVT &VT); 595 bool MipsFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal() function in MipsFastISel 604 return TLI.isTypeLegal(VT); in isTypeLegal() 611 if (isTypeLegal(Ty, VT)) in isTypeSupported() 623 if (isTypeLegal(Ty, VT)) in isLoadTypeLegal() 1104 if (!isTypeLegal(DstTy, DstVT)) in selectFPToInt() 1112 if (!isTypeLegal(SrcTy, SrcVT)) in selectFPToInt() 1528 if (!isTypeLegal(Val->getType(), VT) && in fastLowerCall()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 182 bool isTypeLegal(Type *Ty, MVT &VT); 538 if (!isTypeLegal(CFP->getType(), VT)) in fastMaterializeFloatZero() 975 return TLI.isTypeLegal(VT); in isTypeLegal() 986 if (isTypeLegal(Ty, VT)) in isTypeSupported() 3333 if (!isTypeLegal(RetTy, RetVT)) in foldXALUIntrinsic() 3557 if (!isTypeLegal(II->getType(), VT)) in fastLowerIntrinsicCall() 3593 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall() 3619 if (!isTypeLegal(RetTy, VT)) in fastLowerIntrinsicCall() 4726 if (!isTypeLegal(I->getType(), RetVT)) in selectBitCast() 4801 if (!isTypeLegal(I->getType(), VT)) in selectSDiv() [all …]
|
| H A D | AArch64ISelLowering.cpp | 3171 if (!DAG.getTargetLoweringInfo().isTypeLegal(VT)) in LowerADDC_ADDE_SUBC_SUBE() 3537 if (isTypeLegal(OpVT) && !isTypeLegal(ArgVT)) { in LowerBITCAST() 9567 if (!isTypeLegal(VT) || !VT.isScalableVector()) in LowerDUPQLane() 10381 isTypeLegal(Op.getValueType()) && in LowerCONCAT_VECTORS() 10538 if (!isTypeLegal(VT) || !VT.isInteger()) in LowerINSERT_SUBVECTOR() 11963 assert(isTypeLegal(SplitVT)); in LowerSVEStructLoad() 14209 TLI.isTypeLegal(Op.getValueType()) && in getPTest() 16192 if (!TLI.isTypeLegal(Base.getValueType())) in performScatterStoreCombine() 16202 if (!TLI.isTypeLegal(Offset.getValueType())) in performScatterStoreCombine() 16295 if (!TLI.isTypeLegal(Base.getValueType())) in performGatherLoadCombine() [all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfo.h | 709 bool isTypeLegal(Type *Ty) const; 1519 virtual bool isTypeLegal(Type *Ty) = 0; 1913 bool isTypeLegal(Type *Ty) override { return Impl.isTypeLegal(Ty); } in isTypeLegal() function
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | VectorUtils.cpp | 515 !TTI->isTypeLegal(I.getOperand(0)->getType())) in computeMinimumValueSizes() 524 if (TTI && isa<TruncInst>(&I) && TTI->isTypeLegal(I.getType())) in computeMinimumValueSizes()
|
| H A D | TargetTransformInfo.cpp | 444 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { in isTypeLegal() function in TargetTransformInfo 445 return TTIImpl->isTypeLegal(Ty); in isTypeLegal()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 2348 && (!hasHardQuad || !TLI.isTypeLegal(VT))) { in LowerFP_TO_SINT() 2356 if (!TLI.isTypeLegal(VT)) in LowerFP_TO_SINT() 2379 && (!hasHardQuad || !TLI.isTypeLegal(OpVT))) { in LowerSINT_TO_FP() 2387 if (!TLI.isTypeLegal(OpVT)) in LowerSINT_TO_FP() 2405 (hasHardQuad && TLI.isTypeLegal(VT))) in LowerFP_TO_UINT() 2426 if (Op.getValueType() != MVT::f128 || (hasHardQuad && TLI.isTypeLegal(OpVT))) in LowerUINT_TO_FP()
|