Searched refs:isSignExtended (Results 1 – 7 of 7) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 111 static bool isSignExtended(Register R, MachineRegisterInfo &MRI) { in isSignExtended() function 155 (isSignExtended(LHS, MRI) || isZeroExtended(LHS, MRI))) in matchAArch64MulConstCombine()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 600 bool isSignExtended(const MachineInstr &MI, const unsigned depth = 0) const {
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| H A D | PPCMIPeephole.cpp | 833 TII->isSignExtended(*SrcMI)) { in simplifyCode()
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| H A D | PPCInstrInfo.cpp | 2417 if (isSignExtended(*MI)) in optimizeCompareInstr()
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| H A D | PPCISelLowering.cpp | 11147 static bool isSignExtended(MachineInstr &MI, const PPCInstrInfo *TII) { in isSignExtended() function 11152 return TII->isSignExtended(MI); in isSignExtended() 11216 isSignExtended(*RegInfo.getVRegDef(incr), TII); in EmitPartwordAtomicBinary()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3647 static bool isSignExtended(SDNode *N, SelectionDAG &DAG) { in isSignExtended() function 3665 isSignExtended(N0, DAG) && isSignExtended(N1, DAG); in isAddSubSExt() 3765 bool isN0SExt = isSignExtended(N0, DAG); in LowerMUL() 3766 bool isN1SExt = isSignExtended(N1, DAG); in LowerMUL() 12653 if (N0->hasOneUse() && (isSignExtended(N0.getNode(), DAG) || in performMulCombine()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9103 static bool isSignExtended(SDNode *N, SelectionDAG &DAG) { in isSignExtended() function 9245 isSignExtended(N0, DAG) && isSignExtended(N1, DAG); in isAddSubSExt() 9271 bool isN0SExt = isSignExtended(N0, DAG); in LowerMUL() 9272 bool isN1SExt = isSignExtended(N1, DAG); in LowerMUL()
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