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Searched refs:isShiftedMask (Results 1 – 8 of 8) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp1000 if (MaskC->getValue().isShiftedMask()) { in instCombineIntrinsic()
1045 if (MaskC->getValue().isShiftedMask()) { in instCombineIntrinsic()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp2475 static bool isShiftedMask(uint64_t Mask, EVT VT) { in isShiftedMask() function
2519 if (!isShiftedMask(Known.Zero.getZExtValue(), VT)) in tryBitfieldInsertOpFromOrAndImm()
2693 (isShiftedMask(Mask0Imm, VT) || isShiftedMask(Mask1Imm, VT))) { in tryBitfieldInsertOpFromOr()
2698 if (isShiftedMask(Mask0Imm, VT)) { in tryBitfieldInsertOpFromOr()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/ADT/
H A DAPInt.h522 bool isShiftedMask() const {
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp100 static bool isShiftedMask(uint64_t I, uint64_t &Pos, uint64_t &Size) { in isShiftedMask() function
801 !isShiftedMask(CN->getZExtValue(), SMPos, SMSize)) in performANDCombine()
883 !isShiftedMask(~CN->getSExtValue(), SMPos0, SMSize0)) in performORCombine()
891 !isShiftedMask(CN->getZExtValue(), SMPos1, SMSize1)) in performORCombine()
1136 !isShiftedMask(CN->getZExtValue(), SMPos, SMSize)) in performSHLCombine()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineAddSub.cpp990 C2->isNegative() && C2->isShiftedMask() && *C == (*C & *C2)) { in foldAddWithConstant()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp3265 if (Mask->getAPIntValue().isShiftedMask() && in performSrlCombine()
/freebsd-13.1/contrib/llvm-project/clang/lib/Sema/
H A DSemaChecking.cpp3319 if (Result.isShiftedMask() || (~Result).isShiftedMask()) in SemaValueIsRunOfOnes()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp11847 } else if (Mask.isShiftedMask()) { in ReduceLoadWidth()