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Searched refs:isSEXTLoad (Results 1 – 3 of 3) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp9104 if (N->getOpcode() == ISD::SIGN_EXTEND || ISD::isSEXTLoad(N)) in isSignExtended()
9197 assert((ISD::isSEXTLoad(LD) || ISD::isZEXTLoad(LD)) && in SkipExtensionForVMULL()
18512 bool isSEXTLoad, SDValue &Base, in getARMIndexedAddressParts() argument
18571 bool isSEXTLoad, SDValue &Base, in getT2IndexedAddressParts() argument
18662 bool isSEXTLoad = false; in getPreIndexedAddressParts() local
18668 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD; in getPreIndexedAddressParts()
18677 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD; in getPreIndexedAddressParts()
18692 Ptr.getNode(), VT, Alignment, isSEXTLoad, IsMasked, in getPreIndexedAddressParts()
18720 bool isSEXTLoad = false, isNonExt; in getPostIndexedAddressParts() local
18726 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD; in getPostIndexedAddressParts()
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/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h2697 inline bool isSEXTLoad(const SDNode *N) {
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp5914 (ISD::isSEXTLoad(N0.getNode()) && N0.hasOneUse()))) { in visitAND()
10787 bool isAExtLoad = (ExtLoadType == ISD::SEXTLOAD) ? ISD::isSEXTLoad(N0Node) in tryToFoldExtOfExtload()