| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 755 bool isInlineConstant(const APInt &Imm) const;
757 bool isInlineConstant(const APFloat &Imm) const { in isInlineConstant() function
758 return isInlineConstant(Imm.bitcastToAPInt()); in isInlineConstant()
763 bool isInlineConstant(const MachineOperand &MO, in isInlineConstant() function
765 return isInlineConstant(MO, OpInfo.OperandType); in isInlineConstant()
770 bool isInlineConstant(const MachineInstr &MI, in isInlineConstant() function
779 return isInlineConstant(DefMO, MI.getDesc().OpInfo[OpIdx]); in isInlineConstant()
789 bool isInlineConstant(const MachineInstr &MI, unsigned OpIdx, in isInlineConstant() function
800 return isInlineConstant(MO, OpType); in isInlineConstant()
806 bool isInlineConstant(const MachineOperand &MO) const { in isInlineConstant() function
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| H A D | SIShrinkInstructions.cpp | 119 !TII->isInlineConstant(*Src.getParent(), in isKImmOperand()
125 !TII->isInlineConstant(*Src.getParent(), in isKUImmOperand()
134 return !TII->isInlineConstant(Src); in isKImmOrKUImmOperand()
139 return !TII->isInlineConstant(Src); in isKImmOrKUImmOperand()
150 if (!isInt<32>(Src.getImm()) || TII->isInlineConstant(Src)) in isReverseInlineImm()
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| H A D | SIFoldOperands.cpp | 155 if (TII->isInlineConstant(UseMI, OpNo, OpToFold)) in isInlineConstantIfFolded()
166 return TII->isInlineConstant(OpToFold, MadDesc.OpInfo[OpNo].OperandType); in isInlineConstantIfFolded()
457 !TII->isInlineConstant(*OpToFold, OpInfo)) { in tryAddToFoldList()
515 if (TII->isInlineConstant(*Op, OpTy)) in getRegSeqInit()
547 if (OpToFold.isImm() && TII->isInlineConstant(OpToFold, OpTy) && in tryToFoldACImm()
570 if (DefOp.isImm() && TII->isInlineConstant(DefOp, OpTy) && in tryToFoldACImm()
590 if (!TII->isInlineConstant(*Op, OpTy) || in tryToFoldACImm()
714 TII->isInlineConstant(OpToFold, AMDGPU::OPERAND_REG_INLINE_C_INT32)) { in foldOperand()
773 TII->isInlineConstant(*Def, AMDGPU::OPERAND_REG_INLINE_C_INT32)) { in foldOperand()
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| H A D | AMDGPUISelDAGToDAG.cpp | 164 return Subtarget->getInstrInfo()->isInlineConstant(Imm); in isInlineImmediate()
598 return TII->isInlineConstant(-C->getAPIntValue()); in isInlineImmediate()
601 return TII->isInlineConstant(-C->getValueAPF().bitcastToAPInt()); in isInlineImmediate()
605 return TII->isInlineConstant(C->getAPIntValue()); in isInlineImmediate()
608 return TII->isInlineConstant(C->getValueAPF().bitcastToAPInt()); in isInlineImmediate()
1904 !TII->isInlineConstant(APInt(32, COffsetVal & 0xffffffff)) + in SelectGlobalSAddr()
1905 !TII->isInlineConstant(APInt(32, COffsetVal >> 32)); in SelectGlobalSAddr()
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| H A D | SIInstrInfo.cpp | 1776 if (Imm.isIntN(32) || isInlineConstant(Imm)) { in expandPostRAPseudo()
2786 if (!isInlineConstant(Imm)) in FoldImmediate()
2828 if (isInlineConstant(UseMI, *Src0, *ImmOp)) in FoldImmediate()
2902 isInlineConstant(Def->getOperand(1)) && in FoldImmediate()
2920 isInlineConstant(Def->getOperand(1)) && in FoldImmediate()
3130 if (Src0->isImm() && !isInlineConstant(MI, Src0Idx, *Src0)) in convertToThreeAddress()
3349 bool SIInstrInfo::isInlineConstant(const APInt &Imm) const { in isInlineConstant() function in SIInstrInfo
3369 bool SIInstrInfo::isInlineConstant(const MachineOperand &MO, in isInlineConstant() function in SIInstrInfo
3454 return !isInlineConstant(MO, OpInfo); in isLiteralConstantLike()
3494 if (MO.isImm() && isInlineConstant(MO, OpInfo)) { in isImmOperandLegal()
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| H A D | SIFixSGPRCopies.cpp | 744 TII->isInlineConstant(APInt(64, Copied.getImm(), true))) { in runOnMachineFunction()
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| H A D | AMDGPUInstructionSelector.cpp | 2182 if (IsSgpr && TII.isInlineConstant(Imm)) { in selectG_CONSTANT()
3618 !TII.isInlineConstant(APInt(32, ConstOffset & 0xffffffff)) + in selectGlobalSAddr()
3619 !TII.isInlineConstant(APInt(32, ConstOffset >> 32)); in selectGlobalSAddr()
4432 return TII.isInlineConstant(Imm); in isInlineImmediate()
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| H A D | SILoadStoreOptimizer.cpp | 1661 if (TII->isInlineConstant(V)) in createRegOrImm()
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| H A D | SIISelLowering.cpp | 8962 (CRHS->hasOneUse() && !TII->isInlineConstant(CRHS->getAPIntValue()))) { in splitBinaryBitConstantOp()
9916 TII->isInlineConstant(K0->getValueAPF().bitcastToAPInt())) && in performFPMed3ImmCombine()
9918 TII->isInlineConstant(K1->getValueAPF().bitcastToAPInt()))) { in performFPMed3ImmCombine()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1556 bool isInlineConstant(const MCInst &Inst, unsigned OpIdx) const;
3159 bool AMDGPUAsmParser::isInlineConstant(const MCInst &Inst, in isInlineConstant() function in AMDGPUAsmParser
3225 return !isInlineConstant(Inst, OpIdx); in usesConstantBus()
3927 if (MO.isImm() && !isInlineConstant(Inst, OpIdx)) { in validateSOPLiteral()
4018 if (MO.isImm() && !isInlineConstant(Inst, OpIdx)) { in validateVOP3Literal()
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