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Searched refs:immediate (Results 1 – 25 of 272) sorted by relevance

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/freebsd-13.1/stand/ficl/softwords/
H A Dprefix.fr21 : " postpone s" ; immediate
25 : .( postpone .( ; immediate
30 \ : // postpone \ ; immediate
47 : 0b 2 __tempbase ; immediate
49 : 0o 8 __tempbase ; immediate
51 \ : 0d 10 __tempbase ; immediate
54 \ : 0x 16 __tempbase ; immediate
H A Difbrack.fr42 ; immediate
45 0= if postpone [else] then ; immediate
47 : [then] ( -- ) ; immediate
48 : [endif] ( -- ) ; immediate
H A Dsoftcore.fr52 ; immediate
88 ; immediate
90 : local ( name -- ) bl word count (local) ; immediate
92 : 2local ( name -- ) bl word count (2local) ; immediate
94 : end-locals ( -- ) 0 0 (local) ; immediate
199 : debug ' debug-xt ; immediate
H A Doo.fr142 ; immediate
151 ; immediate
166 \ given its class at compile time. Classes are immediate,
178 ; immediate compile-only
182 ; immediate compile-only
202 ; immediate compile-only
355 immediate
504 create immediate \ get the subclass name
575 : hasvtable 4 + ; immediate
584 create immediate
H A Dficllocal.fr47 ; immediate compile-only
/freebsd-13.1/contrib/bearssl/T0/
H A Dkern.t01 : \ `\n parse drop ; immediate
8 \ : ( `) parse drop ; immediate
11 : while postpone if 1 cs-roll ; immediate
14 : ['] ' ; immediate
15 : [compile] compile ; immediate
45 -1 __deflocals ; immediate
134 : case 0 ; immediate
136 : endof postpone else ; immediate
144 : choice 0 ; immediate
145 : uf 1+ postpone if ; immediate
[all …]
/freebsd-13.1/sys/dev/aic7xxx/aicasm/
H A Daicasm_insformat.h49 uint32_t immediate : 8, member
61 immediate : 8;
85 uint32_t immediate : 8, member
95 immediate : 8;
H A Daicasm_gram.y207 %type <expression> expression immediate immediate_or_a
907 immediate:
1214 T_BMOV destination ',' source ',' immediate ret ';'
1231 T_MVI destination ',' immediate ret ';'
1341 T_OR reg_symbol ',' immediate jmp_jc_jnc_call address ';'
1372 T_MVI immediate jmp_jc_jnc_call address ';'
1630 f1_instr->immediate = immed->value; in format_1_instr()
1770 f3_instr->immediate = immed->value; in format_3_instr()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp1907 if(immediate & 0x80) in translateImmediate()
1908 immediate |= ~(0xffull); in translateImmediate()
1911 if(immediate & 0x8000) in translateImmediate()
1923 if(immediate & 0x80) in translateImmediate()
1924 immediate |= ~(0xffull); in translateImmediate()
1927 if(immediate & 0x8000) in translateImmediate()
1931 if(immediate & 0x80000000) in translateImmediate()
1942 if(immediate & 0x80) in translateImmediate()
1943 immediate |= ~(0xffull); in translateImmediate()
1946 if(immediate & 0x8000) in translateImmediate()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/utils/TableGen/
H A DX86RecognizableInstr.cpp521 HANDLE_OPTIONAL(immediate) in emitInstructionSpecifier()
544 HANDLE_OPTIONAL(immediate) in emitInstructionSpecifier()
568 HANDLE_OPTIONAL(immediate) in emitInstructionSpecifier()
585 HANDLE_OPTIONAL(immediate) in emitInstructionSpecifier()
616 HANDLE_OPTIONAL(immediate) in emitInstructionSpecifier()
633 HANDLE_OPTIONAL(immediate) in emitInstructionSpecifier()
675 HANDLE_OPTIONAL(immediate) in emitInstructionSpecifier()
710 HANDLE_OPERAND(immediate) in emitInstructionSpecifier()
711 HANDLE_OPERAND(immediate) in emitInstructionSpecifier()
716 HANDLE_OPERAND(immediate) in emitInstructionSpecifier()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVVPInstrPatternsVec.td45 // TODO We do not specify patterns for the immediate variants here. There
46 // will be an immediate folding pass that takes care of switching to the
47 // immediate variant where applicable.
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZOperands.td40 // Constructs both a DAG pattern and instruction operand for an immediate
147 // A BDMode paired with an immediate length operand of LENSIZE bits.
171 // Extracting immediate operands from nodes
223 // Truncate an immediate to a 8-bit signed quantity.
229 // Truncate an immediate to a 8-bit unsigned quantity.
241 // Truncate an immediate to a 12-bit unsigned quantity.
247 // Truncate an immediate to a 16-bit signed quantity.
259 // Truncate an immediate to a 16-bit unsigned quantity.
265 // Truncate an immediate to a 32-bit signed quantity.
277 // Truncate an immediate to a 32-bit unsigned quantity.
[all …]
/freebsd-13.1/tests/sys/netpfil/pf/
H A Dridentifier.sh60 jexec alcatraz tcpdump --immediate-mode -n -e -i pflog0 > tcpdump.log &
81 jexec alcatraz tcpdump --immediate-mode -n -e -i pflog0 > tcpdump.log &
/freebsd-13.1/contrib/libpcap/testprogs/
H A Dcapturetest.c70 int immediate = 0; in main() local
94 immediate = 1; in main()
142 if (immediate) { in main()
H A Dthreadsignaltest.c185 int immediate = 0; in main() local
232 if (immediate) { in main()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrFormatsC.td48 // The immediate value encoding differs for each instruction, so each subclass
64 // The immediate value encoding differs for each instruction, so each subclass
90 // The immediate value encoding differs for each instruction, so each subclass
105 // The immediate value encoding differs for each instruction, so each subclass
H A DRISCVSchedule.td12 def WriteShiftImm : SchedWrite; // 32 or 64-bit shift by immediate operations
13 def WriteShiftImm32 : SchedWrite; // 32-bit shift by immediate operations on RV64Ix
14 def WriteShiftReg : SchedWrite; // 32 or 64-bit shift by immediate operations
15 def WriteShiftReg32 : SchedWrite; // 32-bit shift by immediate operations on RV64Ix
118 def ReadShiftImm32 : SchedRead; // 32-bit shift by immediate operations on RV64Ix
H A DRISCVInstrInfoC.td76 // c_lui_imm checks the immediate range is in [1, 31] or [0xfffe0, 0xfffff].
79 // bit 17. Therefore, this 6-bit immediate can represent values in the ranges
97 // A 7-bit unsigned immediate where the least significant two bits are zero.
111 // A 8-bit unsigned immediate where the least significant two bits are zero.
125 // A 8-bit unsigned immediate where the least significant three bits are zero.
139 // A 9-bit signed immediate where the least significant bit is zero.
156 // A 9-bit unsigned immediate where the least significant three bits are zero.
170 // A 10-bit unsigned immediate where the least significant two bits are zero
171 // and the immediate can't be zero.
186 // A 10-bit signed immediate where the least significant four bits are zero.
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64Schedule.td43 def WriteLD : SchedWrite; // Load from base addr plus immediate offset
44 def WriteST : SchedWrite; // Store to base addr plus immediate offset
75 def WriteFImm : SchedWrite; // Floating-point immediate.
H A DAArch64SchedPredExynos.td143 // Identify EXTR as the alias for ROR (immediate).
148 // Identify cheap arithmetic and logic immediate instructions.
/freebsd-13.1/sys/cam/scsi/
H A Dscsi_sa.h70 u_int8_t immediate; member
83 u_int8_t immediate; member
990 u_int8_t tag_action, int immediate, u_int8_t sense_len,
1000 u_int8_t tag_action, int immediate, int eot,
1006 u_int8_t tag_action, int immediate, int setmark,
1019 u_int8_t tag_action, int immediate, int long_erase,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.td63 // Extract bits 0-15 (low-end) of an immediate value.
69 // Extract bits 16-31 (high-end) of an immediate value.
70 // Transformation function: shift the immediate value down into the low bits.
120 // i32lo16 predicate - true if the 32-bit immediate has only rightmost 16
126 // i32neg16 predicate - true if the 32-bit immediate is negative and can
133 // i32lo16 predicate - true if the 32-bit immediate has only rightmost 16
141 // i32lo16 predicate - true if the 32-bit immediate has the rightmost 16
150 // i32hi16 predicate - true if the 32-bit immediate has only leftmost 16
159 // i32lo16 predicate - true if the 32-bit immediate has the leftmost 16
831 // unsigned 16-bit immediate
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCInstrFormats.td136 // SX - Signed X-bit immediate.
137 // UX - Unsigned X-bit immediate.
149 // or a 6-bit unsigned immediate (immU6), depending on the format.
265 // 1-register, unsigned 6-bit immediate Single Operand instruction with
336 // 2-register, unsigned 6-bit immediate Dual Operand instruction.
356 // 2-register, unsigned 6-bit immediate Dual Operand instruction with
380 // 2-register, signed 12-bit immediate Dual Operand instruction.
400 // 2-register, 32-bit immediate (LImm) Dual Operand instruction.
401 // This instruction has the 32-bit immediate in bits 32-63, and
473 // LImm Load. The 32-bit immediate address is in Inst[63-32].
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreInstrFormats.td41 // 3R with first operand as an immediate. Used for TSETR where the first
42 // operand is treated as an immediate since it refers to a register number in
160 // 2R with first operand as an immediate. Used for TSETMR where the first
161 // operand is treated as an immediate since it refers to a register number in
/freebsd-13.1/crypto/openssl/doc/man3/
H A DSSL_pending.pod22 and are available inside B<ssl> for immediate read.
48 bytes that are pending and are available for immediate read. SSL_has_pending()

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