Searched refs:hasSVE (Results 1 – 7 of 7) sorted by relevance
114 if (ST->hasSVE()) in getRegisterBitWidth()119 return TypeSize::getScalable(ST->hasSVE() ? 128 : 0); in getRegisterBitWidth()129 if (ST->hasSVE()) in getMaxVScale()240 if (!ST->hasSVE()) in isLegalMaskedLoadStore()260 if (!ST->hasSVE()) in isLegalMaskedGatherScatter()314 bool supportsScalableVectors() const { return ST->hasSVE(); } in supportsScalableVectors()
352 return hasSVE() && getMinSVEVectorSizeInBits() >= 256; in useSVEForFixedLengthVectors()
399 if (MF.getSubtarget<AArch64Subtarget>().hasSVE()) { in hasBasePointer()448 assert((!MF.getSubtarget<AArch64Subtarget>().hasSVE() || in useFPForScavengingIndex()
461 bool hasSVE() const { return HasSVE; } in hasSVE() function
3345 assert(Subtarget.hasSVE() && "Unexpected SVE register."); in copyPhysReg()3356 assert(Subtarget.hasSVE() && "Unexpected SVE register."); in copyPhysReg()3682 assert(Subtarget.hasSVE() && "Unexpected register store without SVE"); in storeRegToStackSlot()3726 assert(Subtarget.hasSVE() && "Unexpected register store without SVE"); in storeRegToStackSlot()3748 assert(Subtarget.hasSVE() && "Unexpected register store without SVE"); in storeRegToStackSlot()3759 assert(Subtarget.hasSVE() && "Unexpected register store without SVE"); in storeRegToStackSlot()3836 assert(Subtarget.hasSVE() && "Unexpected register load without SVE"); in loadRegFromStackSlot()3880 assert(Subtarget.hasSVE() && "Unexpected register load without SVE"); in loadRegFromStackSlot()3902 assert(Subtarget.hasSVE() && "Unexpected register load without SVE"); in loadRegFromStackSlot()3913 assert(Subtarget.hasSVE() && "Unexpected register load without SVE"); in loadRegFromStackSlot()[all …]
288 if (Subtarget->hasSVE()) { in AArch64TargetLowering()1137 if (Subtarget->hasSVE()) in AArch64TargetLowering()1150 if (Subtarget->hasSVE()) { in AArch64TargetLowering()
113 def HasSVE : Predicate<"Subtarget->hasSVE()">,