| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1418 CondCode getSetCCInverse(CondCode Operation, EVT Type);
1427 CondCode getSetCCInverse(CondCode Operation, bool isIntegerLike);
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 887 ISD::CondCode InverseCC = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
927 ISD::CondCode CCInv = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
953 CCOpcode = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
1902 LHSCC = ISD::getSetCCInverse(LHSCC, LHS.getOperand(0).getValueType()); in PerformDAGCombine()
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| H A D | AMDGPUISelLowering.cpp | 3700 getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), LHS.getValueType()); in performSelectCombine()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 409 CCCode = getSetCCInverse(CCCode, RetVT); in softenSetCCOperands()
422 CCCode = getSetCCInverse(CCCode, RetVT); in softenSetCCOperands()
3199 Cond = ISD::getSetCCInverse(Cond, OpVT); in foldSetCCWithAnd()
3289 NewCond = getSetCCInverse(NewCond, XVT); in optimizeSetCCOfSignedTruncationCheck()
3493 ISD::CondCode InvCond = ISD::getSetCCInverse(Cond, CTVT); in simplifySetCCWithCTPOP()
3657 ISD::CondCode InvCond = ISD::getSetCCInverse( in SimplifySetCC()
3816 CC = ISD::getSetCCInverse(CC, N0.getOperand(0).getValueType()); in SimplifySetCC()
8856 InvCC = getSetCCInverse(CCCode, OpVT); in LegalizeSetCCCondCode()
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| H A D | SelectionDAG.cpp | 477 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, EVT Type) { in getSetCCInverse() function in ISD
481 ISD::CondCode ISD::GlobalISel::getSetCCInverse(ISD::CondCode Op, in getSetCCInverse() function in ISD::GlobalISel
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| H A D | DAGCombiner.cpp | 7802 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR()
10029 SatCC = ISD::getSetCCInverse(SatCC, VT.getScalarType()); in visitVSELECT()
10076 SatCC = ISD::getSetCCInverse(SatCC, VT.getScalarType()); in visitVSELECT()
22640 CC = ISD::getSetCCInverse(CC, CmpOpVT); in SimplifySelectCC()
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| H A D | LegalizeDAG.cpp | 3645 ISD::CondCode InvCC = ISD::getSetCCInverse(CCOp, Tmp1.getValueType()); in ExpandNode()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2447 changeFPCCToAArch64CC(getSetCCInverse(CC, /* FP inverse */ MVT::f32), in changeVectorFPCCToAArch64CC()
2714 CC = getSetCCInverse(CC, LHS.getValueType()); in emitConjunctionRec()
3148 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerXOR()
7233 LHS, RHS, ISD::getSetCCInverse(CC, LHS.getValueType()), CCVal, DAG, dl); in LowerSETCC()
7258 changeFPCCToAArch64CC(ISD::getSetCCInverse(CC, LHS.getValueType()), CC1, in LowerSETCC()
7334 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
7338 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
7345 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
7353 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
7397 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
[all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 6123 CCVal = ISD::getSetCCInverse(CCVal, LHS.getValueType()); in PerformDAGCombine()
6150 CCVal = ISD::getSetCCInverse(CCVal, LHS.getValueType()); in PerformDAGCombine()
6178 CCVal = ISD::getSetCCInverse(CCVal, LHS.getValueType()); in PerformDAGCombine()
6203 CCVal = ISD::getSetCCInverse(CCVal, LHS.getValueType()); in PerformDAGCombine()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 712 ISD::getSetCCInverse(CC, SetCC.getValueType())); in performSELECTCombine()
747 ISD::getSetCCInverse(CC, SetCC.getValueType())); in performSELECTCombine()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1947 ISD::CondCode NewCC = ISD::GlobalISel::getSetCCInverse(CC, true); in LowerSETCC()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 5358 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
5368 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
5377 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
5419 CC = ISD::getSetCCInverse(CC, LHS.getValueType()); in LowerSELECT_CC()
17045 CC = ISD::getSetCCInverse(CC, /* Integer inverse */ MVT::i32); in PerformHWLoopCombine()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 3853 CC = ISD::getSetCCInverse(CC, InputVT); in getSETCCInGPR()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 2821 CC = ISD::getSetCCInverse(CC, Mode == CmpMode::Int ? MVT::i32 : MVT::f32); in getVectorComparisonOrInvert()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 41446 ISD::CondCode NewCC = ISD::getSetCCInverse( in combineVSelectWithAllOnesOrZeros()
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