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Searched refs:getRegClassIDForVecVT (Results 1 – 3 of 3) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp1296 unsigned InRegClassID = RISCVTargetLowering::getRegClassIDForVecVT(VT); in Select()
1297 assert(RISCVTargetLowering::getRegClassIDForVecVT(SubVecContainerVT) == in Select()
1340 unsigned InRegClassID = RISCVTargetLowering::getRegClassIDForVecVT(InVT); in Select()
1341 assert(RISCVTargetLowering::getRegClassIDForVecVT(SubVecContainerVT) == in Select()
H A DRISCVISelLowering.h493 static unsigned getRegClassIDForVecVT(MVT VT);
H A DRISCVISelLowering.cpp147 unsigned RCID = getRegClassIDForVecVT(ContainerVT); in RISCVTargetLowering()
1160 unsigned RISCVTargetLowering::getRegClassIDForVecVT(MVT VT) { in getRegClassIDForVecVT() function in RISCVTargetLowering
1179 unsigned VecRegClassID = getRegClassIDForVecVT(VecVT); in decomposeSubvectorInsertExtractToSubRegs()
1180 unsigned SubRegClassID = getRegClassIDForVecVT(SubVecVT); in decomposeSubvectorInsertExtractToSubRegs()