Home
last modified time | relevance | path

Searched refs:getNOT (Results 1 – 15 of 15) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1357 SDValue New = TLO.DAG.getNOT(dl, Op0, VT); in SimplifyDemandedBits()
3217 SDValue NotX = DAG.getNOT(SDLoc(X), X, OpVT); in foldSetCCWithAnd()
4357 N0 = DAG.getNOT(dl, Temp, OpVT); in SimplifySetCC()
4366 Temp = DAG.getNOT(dl, N0, OpVT); in SimplifySetCC()
4373 Temp = DAG.getNOT(dl, N1, OpVT); in SimplifySetCC()
4380 Temp = DAG.getNOT(dl, N0, OpVT); in SimplifySetCC()
4387 Temp = DAG.getNOT(dl, N1, OpVT); in SimplifySetCC()
6528 Z = DAG.getNOT(DL, Z, ShVT); in expandFunnelShift()
7081 Op = DAG.getNOT(dl, Op, VT); in expandCTLZ()
7126 ISD::AND, dl, VT, DAG.getNOT(dl, Op, VT), in expandCTTZ()
[all …]
H A DDAGCombiner.cpp5091 SDValue Mask = DAG.getNOT(DL, Diff, OpVT); in foldLogicOfSetCCs()
7735 SDValue NotX = DAG.getNOT(DL, X, VT); in unfoldMaskedMerge()
7737 SDValue NotLHS = DAG.getNOT(DL, LHS, VT); in unfoldMaskedMerge()
7743 SDValue NotM = DAG.getNOT(DL, M, VT); in unfoldMaskedMerge()
7888 SDValue NotX = DAG.getNOT(SDLoc(X), X, VT); in visitXOR()
9362 SDValue NotCond = DAG.getNOT(DL, Cond, MVT::i1); in foldSelectOfConstants()
9468 SDValue NotCond = DAG.getNOT(SDLoc(N), Cond, VT); in foldBoolSelectToLogic()
9474 SDValue NotCond = DAG.getNOT(SDLoc(N), Cond, VT); in foldBoolSelectToLogic()
10907 SDValue NotX = DAG.getNOT(DL, X, VT); in foldExtendedSignBitTest()
22400 Shift = DAG.getNOT(DL, Shift, AType); in foldSelectCCToShiftAnd()
[all …]
H A DSelectionDAG.cpp1321 SDValue SelectionDAG::getNOT(const SDLoc &DL, SDValue Val, EVT VT) { in getNOT() function in SelectionDAG
5058 return getNOT(DL, Operand, Operand.getValueType()); in getNode()
5645 return getNode(ISD::AND, DL, VT, N1, getNOT(DL, N2, VT)); in getNode()
H A DLegalizeIntegerTypes.cpp3728 SignsMatch = DAG.getNOT(dl, SignsMatch, VT); in ExpandIntRes_SADDSUBO()
H A DSelectionDAGBuilder.cpp7153 DAG.getNOT(DL, VectorInduction.getValue(1), CCVT), in visitIntrinsicCall()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp1527 DAG.getNOT(DL, Bit, ResTy)); in lowerMSABitClear()
2088 return DAG.getNOT(DL, Res, Res->getValueType(0)); in lowerINTRINSIC_WO_CHAIN()
2094 return DAG.getNOT(DL, Res, Res->getValueType(0)); in lowerINTRINSIC_WO_CHAIN()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp2074 Res = DAG.getNOT(DL, Res, Res.getValueType()); in LowerSELECT()
2190 return DAG.getNOT(DL, Res, Res.getValueType()); in LowerSELECT()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h891 SDValue getNOT(const SDLoc &DL, SDValue Val, EVT VT);
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1118 DstMask = DAG.getNOT(DL, DstMask, MVT::i32); in lowerPrivateTruncStore()
H A DAMDGPUISelLowering.cpp2239 SDValue Not = DAG.getNOT(SL, Shr, MVT::i64); in LowerFTRUNC()
H A DSIISelLowering.cpp5529 DAG.getNOT(SL, BFM, IntVT), BCVec); in lowerINSERT_VECTOR_ELT()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp23326 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
23411 Result = DAG.getNOT(dl, Result, MVT::v4i32); in LowerVSETCC()
23434 Result = DAG.getNOT(dl, Result, MVT::v4i32); in LowerVSETCC()
23454 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
23920 Res = DAG.getNOT(DL, Res, Res.getValueType()); in LowerSELECT()
24033 return DAG.getNOT(DL, Res, Res.getValueType()); in LowerSELECT()
41572 Cond = DAG.getNOT(DL, Cond, MVT::i1); in combineSelectOfTwoConstants()
42118 SDValue CondNew = DAG.getNOT(DL, Cond, CondVT); in combineSelect()
47520 return DAG.getBitcast(VT, DAG.getNOT(SDLoc(N), N0.getOperand(0), in combineXor()
48742 DAG.getNOT(DL, N0.getOperand(1), OpVT)); in combineSetCC()
[all …]
H A DX86ISelDAGToDAG.cpp858 Complement = CurDAG->getNOT(dl, Complement, VT); in PreprocessISelDAG()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp4040 DAG.getSelect(dl, VTy, HiIsZero, Lo, DAG.getNOT(dl, Lo, VTy)); in LowerINTRINSIC_WO_CHAIN()
6624 Merged = DAG.getNOT(dl, Merged, CmpVT); in LowerVSETCC()
6666 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
6678 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
6720 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
6754 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp10795 return DAG.getNOT(dl, Fcmeq, VT); in EmitVectorComparison()
10834 return DAG.getNOT(dl, Cmeq, VT); in EmitVectorComparison()
10932 Cmp = DAG.getNOT(dl, Cmp, Cmp.getValueType()); in LowerVSETCC()