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Searched refs:getMaxNumSGPRs (Results 1 – 6 of 6) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNSubtarget.h1040 unsigned getMaxNumSGPRs(unsigned WavesPerEU, bool Addressable) const { in getMaxNumSGPRs() function
1041 return AMDGPU::IsaInfo::getMaxNumSGPRs(this, WavesPerEU, Addressable); in getMaxNumSGPRs()
1070 unsigned getMaxNumSGPRs(const MachineFunction &MF) const;
1080 unsigned getMaxNumSGPRs(const Function &F) const;
H A DAMDGPUSubtarget.cpp860 unsigned MaxNumSGPRs = getMaxNumSGPRs(WavesPerEU.first, false); in getBaseMaxNumSGPRs()
861 unsigned MaxAddressableNumSGPRs = getMaxNumSGPRs(WavesPerEU.first, true); in getBaseMaxNumSGPRs()
886 if (Requested && Requested > getMaxNumSGPRs(WavesPerEU.first, false)) in getBaseMaxNumSGPRs()
902 unsigned GCNSubtarget::getMaxNumSGPRs(const MachineFunction &MF) const { in getMaxNumSGPRs() function in GCNSubtarget
927 unsigned GCNSubtarget::getMaxNumSGPRs(const Function &F) const { in getMaxNumSGPRs() function in GCNSubtarget
H A DSIRegisterInfo.cpp438 unsigned BaseIdx = alignDown(ST.getMaxNumSGPRs(MF), 4) - 4; in reservedPrivateSegmentBufferReg()
497 unsigned MaxNumSGPRs = ST.getMaxNumSGPRs(MF); in getReservedRegs()
2371 return std::min(ST.getMaxNumSGPRs(Occupancy, true), ST.getMaxNumSGPRs(MF)); in getRegPressureLimit()
2559 ST.getMaxNumSGPRs(MF) / 4); in getAllSGPR128()
2565 ST.getMaxNumSGPRs(MF) / 2); in getAllSGPR64()
2570 return makeArrayRef(AMDGPU::SGPR_32RegClass.begin(), ST.getMaxNumSGPRs(MF)); in getAllSGPR32()
H A DGCNSchedStrategy.cpp44 SGPRCriticalLimit = ST.getMaxNumSGPRs(TargetOccupancy, true); in initialize()
389 unsigned MaxSGPRs = ST.getMaxNumSGPRs(MF); in schedule()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.h217 unsigned getMaxNumSGPRs(const MCSubtargetInfo *STI, unsigned WavesPerEU,
H A DAMDGPUBaseInfo.cpp640 unsigned getMaxNumSGPRs(const MCSubtargetInfo *STI, unsigned WavesPerEU, in getMaxNumSGPRs() function