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Searched refs:getLocVT (Results 1 – 25 of 31) sorted by relevance

12

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp238 assert(VA.getLocVT() == MVT::v2i32); in LowerReturn_32()
416 assert(VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2i32); in LowerFormalArguments_32()
449 if (VA.getLocVT() == MVT::f32) in LowerFormalArguments_32()
451 else if (VA.getLocVT() != MVT::i32) { in LowerFormalArguments_32()
835 assert(VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2i32); in LowerCall_32()
850 if (VA.getLocVT() == MVT::f64) { in LowerCall_32()
901 if (VA.getLocVT() != MVT::f32) { in LowerCall_32()
988 if (RVLocs[i].getLocVT() == MVT::v2i32) { in LowerCall_32()
1049 MVT ValTy = VA.getLocVT(); in fixupVariableFloatArgs()
1159 || VA.getLocVT() != MVT::i128) in LowerCall_64()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp272 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
275 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
278 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
484 EVT RegVT = VA.getLocVT(); in LowerCallArguments()
501 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerCallArguments()
510 ArgIn = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerCallArguments()
642 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerReturn()
670 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp363 assert(VA.getLocVT() == MVT::i64); in LowerReturn()
430 Arg = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Arg, in LowerFormalArguments()
434 Arg = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Arg, in LowerFormalArguments()
443 assert(VA.getLocVT() == MVT::i64); in LowerFormalArguments()
649 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
652 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
655 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
663 assert(VA.getLocVT() == MVT::i64); in LowerCall()
778 RV = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), RV, in LowerCall()
782 RV = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), RV, in LowerCall()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp322 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
355 InVals.push_back(DAG.getConstant(0, DL, VA.getLocVT())); in LowerFormalArguments()
430 Arg = DAG.getNode(ISD::SIGN_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
433 Arg = DAG.getNode(ISD::ZERO_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
436 Arg = DAG.getNode(ISD::ANY_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
535 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp170 assert(VALo.getLocVT() == MVT::i32 && VAHi.getLocVT() == MVT::i32 && in assignCustomValue()
260 assert(VALo.getLocVT() == MVT::i32 && VAHi.getLocVT() == MVT::i32 && in assignCustomValue()
H A DMipsISelLowering.cpp3259 MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT(); in LowerCall()
3334 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCall()
3336 ISD::SHL, DL, VA.getLocVT(), Arg, in LowerCall()
3512 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCallResult()
3516 Shift, DL, VA.getLocVT(), Val, in LowerCallResult()
3555 MVT LocVT = VA.getLocVT(); in UnpackFromArgumentSlot()
3566 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in UnpackFromArgumentSlot()
3570 Opcode, DL, VA.getLocVT(), Val, in UnpackFromArgumentSlot()
3671 MVT RegVT = VA.getLocVT(); in LowerFormalArguments()
3704 MVT LocVT = VA.getLocVT(); in LowerFormalArguments()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp460 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
492 unsigned ObjSize = VA.getLocVT().getSizeInBits() / 8; in LowerCCCArguments()
496 << EVT(VA.getLocVT()).getEVTString() << "\n"; in LowerCCCArguments()
505 VA.getLocVT(), DL, Chain, FIN, in LowerCCCArguments()
561 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
667 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
670 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
673 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp642 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
685 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
688 << EVT(VA.getLocVT()).getEVTString() in LowerCCCArguments()
698 VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
770 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
836 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
839 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
842 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp3318 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3327 ArgVT = VA.getLocVT(); in fastLowerCall()
3331 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3347 ArgVT = VA.getLocVT(); in fastLowerCall()
3351 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3353 bool Emitted = X86FastEmitExtend(ISD::ANY_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3356 Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3359 Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3363 ArgVT = VA.getLocVT(); in fastLowerCall()
3367 ArgReg = fastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, ArgReg); in fastLowerCall()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp316 if (VA.getLocVT().getSizeInBits() > Arg.getValueType().getSizeInBits()) { in MatchingStackOffset()
390 ValVT = VA.getLocVT(); in LowerMemArgument()
592 EVT RegVT = VA.getLocVT(); in LowerCall()
681 uint32_t OpSize = (VA.getLocVT().getSizeInBits() + 7) / 8; in LowerCall()
846 EVT CopyVT = VA.getLocVT(); in LowerCallResult()
893 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
1038 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), ValToCopy); in LowerReturn()
1040 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), ValToCopy); in LowerReturn()
1045 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), ValToCopy); in LowerReturn()
1047 ValToCopy = DAG.getBitcast(VA.getLocVT(), ValToCopy); in LowerReturn()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1150 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1153 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1156 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1301 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
1321 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
1324 << EVT(VA.getLocVT()).getEVTString() in LowerCCCArguments()
1335 ArgIn = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
1478 unsigned ObjSize = VA.getLocVT().getSizeInBits() / 8; in LowerReturn()
1506 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp117 assert(VA.getLocVT().getSizeInBits() <= 64 && "Unsupported location size"); in assignValueToReg()
281 uint64_t LocSize = VA.getLocVT().getFixedSizeInBits(); in assignValueToReg()
H A DARMCallingConv.cpp178 assert(PendingMembers[0].getLocVT() == LocVT); in CC_ARM_AAPCS_Custom_Aggregate()
H A DARMFastISel.cpp1900 if (VA.getLocVT() != MVT::f64 || in ProcessCallArgs()
1950 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1959 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1966 unsigned BC = fastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, Arg); in ProcessCallArgs()
1969 ArgVT = VA.getLocVT(); in ProcessCallArgs()
1982 assert(VA.getLocVT() == MVT::f64 && in ProcessCallArgs()
H A DARMISelLowering.cpp2138 (VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2f64)) { in LowerCallResult()
2153 if (VA.getLocVT() == MVT::v2f64) { in LowerCallResult()
2211 int Size = VA.getLocVT().getFixedSizeInBits() / 8; in computeAddrForCallArg()
2439 auto LocBits = VA.getLocVT().getSizeInBits(); in LowerCall()
2450 if (VA.needsCustom() && VA.getLocVT() == MVT::v2f64) { in LowerCall()
2477 assert(VA.getLocVT() == MVT::i32 && in LowerCall()
2988 EVT RegVT = VA.getLocVT(); in IsEligibleForTailCallOptimization()
3151 auto LocBits = VA.getLocVT().getSizeInBits(); in LowerReturn()
3162 (VA.getLocVT() == MVT::v2f64 || VA.getLocVT() == MVT::f64)) { in LowerReturn()
3163 if (VA.getLocVT() == MVT::v2f64) { in LowerReturn()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp72 : LLT(VA.getLocVT()); in getStackValueStoreTypeHack()
169 LLT LocTy(VA.getLocVT()); in assignValueToAddress()
298 MVT LocVT = VA.getLocVT(); in assignValueToAddress()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp234 Val = DAG.getBitcast(VA.getLocVT(), Val); in LowerReturn()
237 Val = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Val); in LowerReturn()
240 Val = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Val); in LowerReturn()
243 Val = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Val); in LowerReturn()
251 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
484 Arg = DAG.getBitcast(VA.getLocVT(), Arg); in LowerCall()
487 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
490 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
493 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
844 MVT RegVT = VA.getLocVT(); in LowerFormalArguments()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp631 const MVT LocVT = VA.getLocVT(); in handleAssignments()
1065 LLT LocTy{VA.getLocVT()}; in extendRegister()
1157 const MVT LocVT = VA.getLocVT(); in assignValueToReg()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DCallingConvLower.h153 MVT getLocVT() const { return LocVT; } in getLocVT() function
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp35 if (VA.getLocVT().getSizeInBits() < 32) { in extendRegisterMin32()
109 if (VA.getLocVT().getSizeInBits() < 32) { in assignValueToReg()
117 buildExtensionHint(VA, Copy.getReg(0), LLT(VA.getLocVT())); in assignValueToReg()
H A DSIISelLowering.cpp1782 MemVT = VA.getLocVT(); in lowerStackParameter()
1796 ExtType, SL, VA.getLocVT(), Chain, FIN, in lowerStackParameter()
2411 MVT VT = VA.getLocVT(); in LowerFormalArguments()
2415 EVT MemVT = VA.getLocVT(); in LowerFormalArguments()
2615 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerReturn()
2624 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerReturn()
2697 Val = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Val, in LowerCallResult()
2702 Val = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Val, in LowerCallResult()
3108 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerCall()
3117 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1159 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
1203 EVT LocVT = VA.getLocVT(); in LowerFormalArguments()
1291 EVT RegVT = VA.getLocVT(); in LowerCall()
1486 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp7028 VA1.getLocVT(), CCValAssign::Full)); in CC_RISCVAssign2XLen()
7367 if (VA.getLocVT().isInteger() && VA.getValVT() == MVT::f16) in convertLocVTToValVT()
7385 EVT LocVT = VA.getLocVT(); in unpackFromRegLoc()
7401 EVT LocVT = VA.getLocVT(); in convertValVTToLocVT()
7411 if (VA.getLocVT().isInteger() && VA.getValVT() == MVT::f16) in convertValVTToLocVT()
7428 EVT LocVT = VA.getLocVT(); in unpackFromMemLoc()
7454 assert(VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64 && in unpackF64OnRV32DSoftABI()
7694 if (VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64) in LowerFormalArguments()
7951 VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64; in LowerCall()
8155 if (VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64) { in LowerCall()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1324 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
1327 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
1335 assert(VA.getLocVT() == MVT::i64); in convertLocVTToValVT()
1351 return DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
1355 return DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
1359 assert(VA.getLocVT() == MVT::i64); in convertValVTToLocVT()
1447 EVT LocVT = VA.getLocVT(); in LowerFormalArguments()
1495 if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32) in LowerFormalArguments()
1684 if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32) in LowerCall()
1769 VA.getLocVT(), Glue); in LowerCall()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1440 MVT DestVT = VA.getLocVT(); in processCallArgs()
1452 MVT DestVT = VA.getLocVT(); in processCallArgs()
1753 MVT DestVT = VA.getLocVT(); in SelectRet()

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