| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.cpp | 612 if (STI->getFeatureBits().test(FeatureSGPRInitBug)) in getAddressableNumSGPRs()
634 if (STI->getFeatureBits().test(FeatureTrapHandler)) in getMinNumSGPRs()
651 if (STI->getFeatureBits().test(FeatureTrapHandler)) in getMaxNumSGPRs()
695 if (STI->getFeatureBits().test(FeatureGFX90AInsts)) in getVGPRAllocGranule()
710 if (STI->getFeatureBits().test(FeatureGFX90AInsts)) in getVGPREncodingGranule()
721 if (STI->getFeatureBits().test(FeatureGFX90AInsts)) in getTotalNumVGPRs()
729 if (STI->getFeatureBits().test(FeatureGFX90AInsts)) in getAddressableNumVGPRs()
1408 return STI.getFeatureBits()[AMDGPU::FeatureXNACK]; in hasXNACK()
1416 …return STI.getFeatureBits()[AMDGPU::FeatureMIMG_R128] && !STI.getFeatureBits()[AMDGPU::FeatureR128… in hasMIMG_R128()
1424 return STI.getFeatureBits()[AMDGPU::FeatureG16]; in hasG16()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 174 if (!(getSTI().getFeatureBits()[Feature])) { in setFeatureBits()
181 bool getFeatureBits(uint64_t Feature) { in getFeatureBits() function in __anonda18b5620111::RISCVAsmParser
182 return getSTI().getFeatureBits()[Feature]; in getFeatureBits()
186 if (getSTI().getFeatureBits()[Feature]) { in clearFeatureBits()
2146 if (getFeatureBits(RISCV::Feature64Bit)) in parseDirectiveAttribute()
2148 if (getFeatureBits(RISCV::FeatureRV32E)) in parseDirectiveAttribute()
2167 if (getFeatureBits(RISCV::FeatureExtZfh)) in parseDirectiveAttribute()
2169 if (getFeatureBits(RISCV::FeatureExtZba)) in parseDirectiveAttribute()
2171 if (getFeatureBits(RISCV::FeatureExtZbb)) in parseDirectiveAttribute()
2173 if (getFeatureBits(RISCV::FeatureExtZbc)) in parseDirectiveAttribute()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 473 if (STI.getFeatureBits()[AMDGPU::FeatureFmaMixInsts]) { in getInstruction()
495 if (STI.getFeatureBits()[AMDGPU::FeatureGFX90AInsts]) { in getInstruction()
512 if (STI.getFeatureBits()[AMDGPU::FeatureGFX90AInsts]) { in getInstruction()
637 if (STI.getFeatureBits()[AMDGPU::FeatureGFX9] || in convertSDWAInst()
638 STI.getFeatureBits()[AMDGPU::FeatureGFX10]) { in convertSDWAInst()
715 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10]) { in convertMIMGInst()
1364 if (STI.getFeatureBits()[AMDGPU::FeatureGFX9] || in decodeSDWASrc()
1365 STI.getFeatureBits()[AMDGPU::FeatureGFX10]) { in decodeSDWASrc()
1411 assert((STI.getFeatureBits()[AMDGPU::FeatureGFX9] || in decodeSDWAVopcDst()
1412 STI.getFeatureBits()[AMDGPU::FeatureGFX10]) && in decodeSDWAVopcDst()
[all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUMCAsmInfo.cpp | 63 if (STI->getFeatureBits()[AMDGPU::FeatureNSAEncoding]) in getMaxInstLength()
67 if (STI->getFeatureBits()[AMDGPU::FeatureVOP3Literal]) in getMaxInstLength()
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| H A D | SIMCCodeEmitter.cpp | 135 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit16Encoding()
171 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit32Encoding()
207 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit64Encoding()
265 if (!isUInt<16>(Imm) && STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal]) in getLitEncoding()
304 computeAvailableFeatures(STI.getFeatureBits())); in encodeInstruction()
340 if ((bytes > 8 && STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal]) || in encodeInstruction()
341 (bytes > 4 && !STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal])) in encodeInstruction()
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| H A D | R600MCCodeEmitter.cpp | 96 computeAvailableFeatures(STI.getFeatureBits())); in encodeInstruction()
108 if (!(STI.getFeatureBits()[R600::FeatureCaymanISA])) { in encodeInstruction()
141 if ((STI.getFeatureBits()[R600::FeatureR600ALUInst]) && in encodeInstruction()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCInstPrinter.cpp | 69 return STI->getFeatureBits().test(C.Value); in matchAliasCondition()
71 return !STI->getFeatureBits().test(C.Value); in matchAliasCondition()
76 OrPredicateResult |= STI->getFeatureBits().test(C.Value); in matchAliasCondition()
80 OrPredicateResult |= !(STI->getFeatureBits().test(C.Value)); in matchAliasCondition()
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| H A D | MCInstrInfo.cpp | 21 STI.getFeatureBits()[DeprecatedFeatures[Opcode]]) { in getDeprecatedInfo()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCTargetDesc.cpp | 41 if (STI.getFeatureBits()[llvm::ARM::HasV7Ops] && in getMCRDeprecationInfo()
68 if (STI.getFeatureBits()[llvm::ARM::HasV7Ops] && in getMCRDeprecationInfo()
80 if (STI.getFeatureBits()[llvm::ARM::HasV7Ops] && in getMRCDeprecationInfo()
92 if (STI.getFeatureBits()[llvm::ARM::HasV8Ops] && MI.getOperand(1).isImm() && in getITDeprecationInfo()
104 assert(!STI.getFeatureBits()[llvm::ARM::ModeThumb] && in getARMStoreDeprecationInfo()
120 assert(!STI.getFeatureBits()[llvm::ARM::ModeThumb] && in getARMLoadDeprecationInfo()
457 return STI.getFeatureBits()[ARM::FeatureCoprocCDE0 + Coproc]; in isCDECoproc()
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| H A D | ARMAsmBackend.cpp | 209 bool HasThumb2 = STI.getFeatureBits()[ARM::FeatureThumb2]; in getRelaxedOpcode()
210 bool HasV8MBaselineOps = STI.getFeatureBits()[ARM::HasV8MBaselineOps]; in getRelaxedOpcode()
604 (!STI->getFeatureBits()[ARM::FeatureThumb2] && in adjustFixupValue()
605 !STI->getFeatureBits()[ARM::HasV8MBaselineOps] && in adjustFixupValue()
606 !STI->getFeatureBits()[ARM::HasV6MOps] && in adjustFixupValue()
679 if (!STI->getFeatureBits()[ARM::FeatureThumb2] && IsResolved) { in adjustFixupValue()
704 if (!STI->getFeatureBits()[ARM::FeatureThumb2] && in adjustFixupValue()
705 !STI->getFeatureBits()[ARM::HasV8MBaselineOps]) { in adjustFixupValue()
716 if (!STI->getFeatureBits()[ARM::FeatureThumb2]) { in adjustFixupValue()
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| H A D | ARMAsmBackend.h | 38 bool hasNOP() const { return STI.getFeatureBits()[ARM::HasV6T2Ops]; } in hasNOP()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVAsmBackend.h | 38 STI.getTargetTriple(), STI.getFeatureBits(), Options.getABIName()); in RISCVAsmBackend()
39 RISCVFeatures::validate(STI.getTargetTriple(), STI.getFeatureBits()); in RISCVAsmBackend()
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| H A D | RISCVAsmBackend.cpp | 137 return STI.getFeatureBits()[RISCV::FeatureRelax] || ForceRelocs; in shouldForceRelocation()
356 bool HasStdExtC = STI.getFeatureBits()[RISCV::FeatureStdExtC]; in writeNopData()
585 if (!STI.getFeatureBits()[RISCV::FeatureRelax]) in shouldInsertExtraNopBytesForCodeAlign()
588 bool HasStdExtC = STI.getFeatureBits()[RISCV::FeatureStdExtC]; in shouldInsertExtraNopBytesForCodeAlign()
608 if (!STI.getFeatureBits()[RISCV::FeatureRelax]) in shouldInsertFixupForCodeAlign()
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| H A D | RISCVMCCodeEmitter.cpp | 175 if (STI.getFeatureBits()[RISCV::FeatureRelax]) { in expandAddTPRel()
194 computeAvailableFeatures(STI.getFeatureBits())); in encodeInstruction()
269 bool EnableRelax = STI.getFeatureBits()[RISCV::FeatureRelax]; in getImmOpValue()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyTargetTransformInfo.cpp | 109 TM.getSubtargetImpl(*Caller)->getFeatureBits(); in areInlineCompatible()
111 TM.getSubtargetImpl(*Callee)->getFeatureBits(); in areInlineCompatible()
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| H A D | WebAssemblyTargetMachine.cpp | 237 ->getFeatureBits(); in coalesceFeatures()
239 Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits(); in coalesceFeatures()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVSubtarget.cpp | 71 TargetABI = RISCVABI::computeTargetABI(TT, getFeatureBits(), ABIName); in initializeSubtargetDependencies()
72 RISCVFeatures::validate(TT, getFeatureBits()); in initializeSubtargetDependencies()
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| H A D | RISCVTargetTransformInfo.cpp | 30 getST()->getFeatureBits()); in getIntImmCost()
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| H A D | RISCVAsmPrinter.cpp | 172 NewSTI.setFeatureBits(MF.getSubtarget().getFeatureBits()); in runOnMachineFunction()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCTargetDesc.cpp | 338 if (STI->getFeatureBits()[F]) in clearFeature()
343 return STI->getFeatureBits()[F]; in checkFeature()
498 llvm::FeatureBitset Features = X->getFeatureBits(); in createHexagonMCSubtargetInfo()
502 X->setFeatureBits(completeHVXFeatures(X->getFeatureBits())); in createHexagonMCSubtargetInfo()
510 llvm::FeatureBitset Features = X->getFeatureBits(); in createHexagonMCSubtargetInfo()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 67 .getFeatureBits(); in DecodeGPRRegisterClass()
440 if (!STI.getFeatureBits()[RISCV::Feature64Bit]) { in getInstruction()
452 if (STI.getFeatureBits()[RISCV::FeatureExtZbproposedc] && in getInstruction()
453 STI.getFeatureBits()[RISCV::FeatureStdExtC]) { in getInstruction()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 474 FeatureBitset FeatureBits = STI.getFeatureBits(); in selectArch()
483 if (!(getSTI().getFeatureBits()[Feature])) { in setFeatureBits()
492 if (getSTI().getFeatureBits()[Feature]) { in clearFeatureBits()
602 return getSTI().getFeatureBits()[Mips::FeatureFPXX]; in isABI_FPXX()
614 return getSTI().getFeatureBits()[Mips::FeatureMips1]; in hasMips1()
674 return getSTI().getFeatureBits()[Mips::FeatureDSP]; in hasDSP()
686 return getSTI().getFeatureBits()[Mips::FeatureMSA]; in hasMSA()
713 return getSTI().getFeatureBits()[Mips::FeatureMT]; in hasMT()
717 return getSTI().getFeatureBits()[Mips::FeatureCRC]; in hasCRC()
721 return getSTI().getFeatureBits()[Mips::FeatureVirt]; in hasVirt()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRELFStreamer.cpp | 63 EFlags |= getEFlagsForFeatureSet(STI.getFeatureBits()); in AVRELFStreamer()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 184 STI.getFeatureBits()[AArch64::HasV8_2aOps]) { in printInst()
811 if (!PRCTX || !PRCTX->haveFeatures(STI.getFeatureBits())) in printSysAlias()
828 if (!IC || !IC->haveFeatures(STI.getFeatureBits())) in printSysAlias()
840 if (!DC || !DC->haveFeatures(STI.getFeatureBits())) in printSysAlias()
851 if (!AT || !AT->haveFeatures(STI.getFeatureBits())) in printSysAlias()
863 if (!TLBI || !TLBI->haveFeatures(STI.getFeatureBits())) in printSysAlias()
1562 if (Reg && Reg->Readable && Reg->haveFeatures(STI.getFeatureBits())) in printMRSSystemRegister()
1588 if (Reg && Reg->Writeable && Reg->haveFeatures(STI.getFeatureBits())) in printMSRSystemRegister()
1600 if (PState && PState->haveFeatures(STI.getFeatureBits())) in printSystemPStateField()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86AsmBackend.cpp | 842 bool Is16BitMode = STI.getFeatureBits()[X86::Mode16Bit]; in relaxInstruction()
861 bool Is16BitMode = STI.getFeatureBits()[X86::Mode16Bit]; in isFullyRelaxed()
1089 if (STI.getFeatureBits()[X86::FeatureFast7ByteNOP]) in getMaximumNopSize()
1091 if (STI.getFeatureBits()[X86::FeatureFast15ByteNOP]) in getMaximumNopSize()
1093 if (STI.getFeatureBits()[X86::FeatureFast11ByteNOP]) in getMaximumNopSize()
1141 STI.getFeatureBits()[X86::Mode16Bit] ? Nops16Bit : Nops32Bit; in writeNopData()
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