Searched refs:getDeadRegState (Results 1 – 11 of 11) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRExpandPseudoInsts.cpp | 167 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandArith() 172 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandArith() 200 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogic() 208 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogic() 296 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand() 300 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand() 353 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand() 361 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand() 699 .addReg(SrcReg, RegState::Define | getDeadRegState(SrcIsDead)) in expand() 730 .addReg(SrcReg, RegState::Define | getDeadRegState(SrcIsDead)) in expand() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 608 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD() 610 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD() 612 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD() 614 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD() 796 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp() 798 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp() 800 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp() 802 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp() 1002 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in ExpandMOV32BitImm() 2573 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)) in ExpandMI() [all …]
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| H A D | MLxExpansionPass.cpp | 298 .addReg(DstReg, getDefRegState(true) | getDeadRegState(DstDead)); in ExpandFPMLxInstruction()
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| H A D | ARMLoadStoreOptimizer.cpp | 1740 .addReg(Reg, getDefRegState(true) | getDeadRegState(RegDeadKill)) in InsertLDR_STR() 1811 .addReg(EvenReg, getDefRegState(isLd) | getDeadRegState(EvenDeadKill)) in FixInvalidRegPairOp() 1812 .addReg(OddReg, getDefRegState(isLd) | getDeadRegState(OddDeadKill)) in FixInvalidRegPairOp()
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstrBuilder.h | 511 inline unsigned getDeadRegState(bool B) { in getDeadRegState() function 531 getKillRegState(RegOp.isKill()) | getDeadRegState(RegOp.isDead()) | in getRegState()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineInstrBundle.cpp | 214 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) | in finalizeBundle()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ExpandPseudo.cpp | 471 .addReg(Reg0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandMI() 473 .addReg(Reg1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandMI()
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| H A D | X86InstrInfo.cpp | 1350 .addReg(Dest, RegState::Define | getDeadRegState(IsDead)) in convertToThreeAddressWithLEA() 6399 getDeadRegState(ImpOp.isDead()) | in unfoldMemoryOperand()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 159 getDeadRegState(DstIsDead && LastItem) | in expandMOVImm() 171 getDeadRegState(DstIsDead && LastItem) | in expandMOVImm() 582 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)); in expand_DestructiveOp()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVExpandPseudoInsts.cpp | 262 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expandVSetVL()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 1202 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) in commuteInstructionImpl()
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