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/freebsd-13.1/sys/powerpc/powerpc/
H A Dclock.c263 uint32_t fdiv; in decr_et_start() local
276 fdiv = (decr_et.et_frequency * first) >> 32; in decr_et_start()
278 fdiv = s->div; in decr_et_start()
288 mtdec(fdiv); in decr_et_start()
291 mtdec(fdiv); in decr_et_start()
/freebsd-13.1/sys/mips/nlm/
H A Dtick.c232 uint32_t fdiv, div, next; in clock_start() local
239 fdiv = (et->et_frequency * first) >> 32; in clock_start()
241 fdiv = div; in clock_start()
243 next = mips_rd_count() + fdiv; in clock_start()
/freebsd-13.1/sys/mips/mips/
H A Dtick.c231 uint32_t fdiv, div, next; in clock_start() local
238 fdiv = (et->et_frequency * first) >> 32; in clock_start()
240 fdiv = div; in clock_start()
242 next = mips_rd_count() + fdiv; in clock_start()
/freebsd-13.1/lib/libc/arm/aeabi/
H A Daeabi_vfp_float.S168 AEABI_ENTRY(fdiv)
173 AEABI_END(fdiv)
H A Daeabi_float.c75 float32 AEABI_FUNC2(fdiv, float32, float32_div) in AEABI_FUNC2()
/freebsd-13.1/sys/dev/acpica/
H A Dacpi_hpet.c213 uint32_t fdiv, now; in hpet_start() local
224 fdiv = (sc->freq * first) >> 32; in hpet_start()
226 fdiv = t->div; in hpet_start()
232 t->next = now + fdiv; in hpet_start()
250 fdiv *= 2; in hpet_start()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoD.td106 def FDIV_D : FPALUD_rr_frm<0b0001101, "fdiv.d">,
108 def : FPALUDDynFrmAlias<FDIV_D, "fdiv.d">;
255 def : PatFpr64Fpr64DynFrm<fdiv, FDIV_D>;
H A DRISCVInstrInfoZfh.td107 def FDIV_H : FPALUH_rr_frm<0b0001110, "fdiv.h">,
109 def : FPALUHDynFrmAlias<FDIV_H, "fdiv.h">;
271 def : PatFpr16Fpr16DynFrm<fdiv, FDIV_H>;
H A DRISCVInstrInfoF.td147 def FDIV_S : FPALUS_rr_frm<0b0001100, "fdiv.s">,
149 def : FPALUSDynFrmAlias<FDIV_S, "fdiv.s">;
320 def : PatFpr32Fpr32DynFrm<fdiv, FDIV_S>;
H A DRISCVInstrInfoVSDPatterns.td593 defm : VPatBinaryFPSDNode_VV_VF<fdiv, "PseudoVFDIV">;
594 defm : VPatBinaryFPSDNode_R_VF<fdiv, "PseudoVFRDIV">;
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/IR/
H A DVPIntrinsics.def195 // llvm.vp.fdiv(x,y,mask,vlen)
196 HELPER_REGISTER_BINARY_FP_VP(fdiv, VP_FDIV, FDiv)
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXInstrInfo.td862 [(set Float64Regs:$dst, (fdiv Float64Regs:$a, Float64Regs:$b))]>;
867 [(set Float64Regs:$dst, (fdiv Float64Regs:$a, fpimm:$b))]>;
876 [(set Float32Regs:$dst, (fdiv FloatConst1:$a, Float32Regs:$b))]>,
882 [(set Float32Regs:$dst, (fdiv FloatConst1:$a, Float32Regs:$b))]>,
891 [(set Float32Regs:$dst, (fdiv Float32Regs:$a, Float32Regs:$b))]>,
897 [(set Float32Regs:$dst, (fdiv Float32Regs:$a, fpimm:$b))]>,
909 [(set Float32Regs:$dst, (fdiv Float32Regs:$a, fpimm:$b))]>,
941 [(set Float32Regs:$dst, (fdiv Float32Regs:$a, fpimm:$b))]>,
953 [(set Float32Regs:$dst, (fdiv Float32Regs:$a, fpimm:$b))]>,
982 [(set Float32Regs:$dst, (fdiv Float32Regs:$a, fpimm:$b))]>,
[all …]
/freebsd-13.1/sys/powerpc/fpu/
H A Dfpu_emu.c131 FPU_EMU_EVCNT_DECL(fdiv);
612 FPU_EMU_EVCNT_INCR(fdiv); in fpu_execute()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFPStack.td318 // of some of the 'reverse' forms of the fsub and fdiv instructions. As such,
342 def DIV_FrST0 : FPrST0Inst <MRM7r, "fdiv{r}\t{%st, $op|$op, st}">;
343 def DIV_FPrST0 : FPrST0PInst<MRM7r, "fdiv{r}p\t{%st, $op|$op, st}">;
344 def DIV_FST0r : FPST0rInst <MRM6r, "fdiv\t{$op, %st|st, $op}">;
345 def DIVR_FrST0 : FPrST0Inst <MRM6r, "fdiv{|r}\t{%st, $op|$op, st}">;
346 def DIVR_FPrST0 : FPrST0PInst<MRM6r, "fdiv{|r}p\t{%st, $op|$op, st}">;
H A DX86InstrInfo.td3489 def : InstAlias<"fdiv{|r}p", (DIVR_FPrST0 ST1), 0>;
3490 def : InstAlias<"fdiv{r|}p", (DIV_FPrST0 ST1), 0>;
3501 // Handle fmul/fadd/fsub/fdiv instructions with explicitly written st(0) op.
3520 defm : FpUnaryAlias<"fdiv", DIV_FST0r, 0>;
3521 defm : FpUnaryAlias<"fdiv{|r}p", DIVR_FPrST0, 0>;
3523 defm : FpUnaryAlias<"fdiv{r|}p", DIV_FPrST0, 0>;
3531 // commute. We also allow fdiv[r]p/fsubrp even though they don't commute,
3537 def : InstAlias<"fdiv{|r}p\t{$op, %st|st, $op}", (DIVR_FPrST0 RSTi:$op), 0>;
3538 def : InstAlias<"fdiv{r|}p\t{$op, %st|st, $op}", (DIV_FPrST0 RSTi:$op), 0>;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMicroMipsInstrFPU.td27 def FDIV_S_MM : MMRel, ADDS_FT<"div.s", FGR32Opnd, II_DIV_S, 0, fdiv>,
36 defm FDIV : ADDS_MMM<"div.d", II_DIV_D, 0, fdiv>,
H A DMipsInstrFPU.td670 def FDIV_S : MMRel, ADDS_FT<"div.s", FGR32Opnd, II_DIV_S, 0, fdiv>,
672 defm FDIV : ADDS_M<"div.d", II_DIV_D, 0, fdiv>, ADDS_FM<0x03, 17>,
H A DMipsScheduleP5600.td479 // fmadd.[wd], fmsubb.[wd], fdiv.[wd], fsqrt.[wd], fmul.[wd], fadd.[wd],
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrFloat.td52 defm DIV : BinaryFP<fdiv, "div ", 0x95, 0xa3>;
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/
H A DSelectionDAGCompat.td100 def : GINodeEquiv<G_FDIV, fdiv>;
/freebsd-13.1/contrib/llvm-project/llvm/lib/AsmParser/
H A DLLLexer.cpp869 INSTKEYWORD(udiv, UDiv); INSTKEYWORD(sdiv, SDiv); INSTKEYWORD(fdiv, FDiv); in LexIdentifier()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructions.td655 (fdiv FP_ONE, vt:$src),
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.td1306 [(set f32:$rd, (fdiv f32:$rs1, f32:$rs2))],
1311 [(set f64:$rd, (fdiv f64:$rs1, f64:$rs2))],
1316 [(set f128:$rd, (fdiv f128:$rs1, f128:$rs2))]>,
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrInfo.td1372 defm FDIVD : RRFm<"fdiv.d", 0x5D, I64, f64, fdiv>;
1374 defm FDIVS : RRFm<"fdiv.s", 0x5D, F32, f32, fdiv, simm7fp, mimmfp32>;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DREADME_P9.txt192 (set f128:$vT, (fdiv f128:$vA, f128:$vB)) // xsdivqp

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